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A Novel Superscalar Architecture for Fast DCT Implementation

  • Zhang Yong
  • Min Zhang
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1800)

Abstract

This paper presents a new superscalar architecture for fast discrete cosine transform (DCT). Comparing with the general SIMD architecture, it speeds up the DCT computation by a factor of two at the cost of small additional hardware overheads.

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References

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    J. Hilgenstock, et al., “A video signal processor for MIMD multiprocessing”, Proceedings of Design Automation Conference, 1998, pp. 50–55.Google Scholar
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    R. B. Lee, “multimedia extensions for general-purpose processors”, IEEE Workshop on Signal Processing Systems, 1997, pp. 9–23Google Scholar
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    A. N. Netravali and B. G. Haskell, “Digital Pictures,-Representation, Compression, and Standards”, Plenum Press, 1995.Google Scholar
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    Zhang Yong, “Research on Video Encoder Design”, Ph. D. Dissertation, Zhejiang University, 1999.Google Scholar
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    D. A. Patterson, J. L. Hennessy, “Computer Architecture a Quantitative Approach”, Morgan Kaufmann Publishers Inc., 1996.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2000

Authors and Affiliations

  • Zhang Yong
    • 1
  • Min Zhang
    • 2
  1. 1.DSP Lab, S2, School of Electronic and Electrical EngineeringNanyang Technological UniversitySingapore
  2. 2.Reseach Institute of Planning & DesignHuaihe River Water Resources Commission of MWRBengbu AnhuiP. R. China

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