Abstract
In the context of an optimizing native code compiler for the concurrent functional programming language Erlang, we experiment with various register allocation schemes focusing on the recently proposed linear scan register allocator. We describe its implementation and extensively report on its behaviour both on register-rich and on register-poor architectures. We also investigate how different options to the basic algorithm and to the compilation process as a whole affect compilation time and quality of the produced code. Overall, the linear scan register allocator is a good choice on register-rich architectures; when compilation time is a concern, it can also be a viable option on register-poor architectures.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
A. V. Aho, R. Sethi, and J. D. Ullman. Compilers: Principles, Techniques and Tools. Addison-Wesley, Reading, MA, 1986.
J. Armstrong, R. Virding, C. Wikström, and M. Williams. Concurrent Programming in Erlang. Prentice-Hall, second edition, 1996.
P. Briggs, K. D. Cooper, and L. Torczon. Improvements to graph coloring register allocation. ACM Trans. Prog. Lang. Syst., 16(3):428–455, May 1994.
G. J. Chaitin. Register allocation & spilling via graph coloring. In Proceedings of the SIGPLAN Symposium on Compiler Construction, pages 98–105. ACM Press, June 1982.
G. J. Chaitin, M. A. Auslander, A. K. Chandra, J. Cocke, M. E. Hopkins, and P.W. Markstein. Register allocation via coloring. Computer Languages, 6(1):47–57, Jan. 1981.
L. George and A. W. Appel. Iterated register coalescing. ACM Trans. Prog. Lang. Syst., 18(3):300–324, May 1996.
E. Johansson, M. Pettersson, and K. Sagonas. HiPE: A High Performance Erlang system. In Proceedings of the ACM SIGPLAN International Conference on Principles and Practice of Declarative Programming, pages 32–43. ACM Press, Sept. 2000.
S. S. Muchnick. Advanced Compiler Design & Implementation. Morgan Kaufman Publishers, San Fransisco, CA, 1997.
J. Park and S.-M. Moon. Optimistic register coalescing. In Proceedings of the 1998 International Conference on Parallel Architecture and Compilation Techniques, pages 196–204. IEEE Press, Oct. 1998.
M. Poletto, W. C. Hsieh, D. R. Engler, and M. F. Kaashoek. ’C and tcc: A language and compiler for dynamic code generation. ACM Trans. Prog. Lang. Syst., 21(2):324–369, Mar. 1999.
M. Poletto and V. Sarkar. Linear scan register allocation. ACM Trans. Prog. Lang. Syst., 21(5):895–913, Sept. 1999.
O. Traub, G. Holloway, and M. D. Smith. Quality and speed in linear-scan register allocation. In Proceedings of SIGPLAN Conference on Programming Language Design and Implementation, pages 142–151. ACM Press, June 1998.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2002 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Johansson, E., Sagonas, K. (2002). Linear Scan Register Allocation in a High-Performance Erlang Compiler. In: Krishnamurthi, S., Ramakrishnan, C.R. (eds) Practical Aspects of Declarative Languages. PADL 2002. Lecture Notes in Computer Science, vol 2257. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45587-6_8
Download citation
DOI: https://doi.org/10.1007/3-540-45587-6_8
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-43092-6
Online ISBN: 978-3-540-45587-5
eBook Packages: Springer Book Archive