Abstract
An efficient implementation of modular exponentiation is achieved by first designing a bit-level systolic array such that the whole procedure of modular exponentiation can be carried out without using global interconnections or memory to store intermediate results, and then mapping this design onto Xilinx XC6000 Field Programmable Gate Arrays. Taking as a starting point for a FPGA program an efficient bit-level systolic algorithm facilitates the design process but does not automatically guarantee the most efficient hardware solution. We use an example of modular exponentiation with Montgomery multiplication to demonstrate a role of layout optimisation and partitioning in mapping linear systolic arrays onto two-dimensional arrays of FPGA cells.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Bosselaers, A., Govaerts, R., Vandewalle, J.: Comparison of Three Modular Reduction Functions. 175–186
Buell, D.A., Arnold, J.M., and Kleinfelder W.J. (eds.): Splash 2: FPGAs in a Custom Computing Machine. IEEE Computer Society Press (1996)
Dusse, S.R., and Kaliski, B.S.: A Cryptographic Library for the Motorola DSP56000. In: Advances in Cryptology — EUROCRYPT’90. Lecture Notes in Computer Science, Vol. 473. Spinger-Verlag, Berlin Heidelberg New York (1990) 230–244.
Eldridge, S.E.: A Faster Modular Multiplication Algorithm. Intern. J. Computer Math. 40 (1993) 63–68
Eldridge, S.E., Walter, C.D.: Hardware Implementation of Montgomery’s Modular Multiplication Algorithm. IEEE Trans. on Comput. 42 (1993) 693–699
ElGamal, T.: A Public-Key cCryptosystem and a Signature Scheme Based on Discrete Logarithms. IEEE Trans. Inform. Theory. 31 (1985) 469–472
Even, S.: Systolic Modular Multiplication, In: Advances in Cryptology — Crypto’90. Lecture Notes in Computer Science, Vol. 537. Spinger-Verlag (1990) 619–624
Fiat, A., and Shamir, A.: How to Prove Yourself, In: Advances in Cryptology — Crypto’86. Lecture Notes in Computer Science, Vol. 263. Springer-Verlag (1986) 186–194
Iwamura, K., Matsumoto, T., Imai, H.: Modular Exponentiation Using Montgomery Method and the Systolic Array, IEICE Technical Report, Vol. 92, no. 134, ISEC92-7 (1992) 49’54
Montgomery, P.L.: Modular Multiplication Without Trial Division. Mathematics of Computations. 44 (1985) 519–521
Koç, Ç. K., RSA Hardware Implementation, TR 801, RSA Laboratories, 30 pages, April 1996. http://www.ece.orst.edu/ koc/vita/v22ab.html
Orup, H., Svendsen, E., And, E.: VICTOR an Efficient RSA Hardware Implementation. In: Eurocrypt 90, Lecture Notes in Computer Science, Vol. 473. Springer-Verlag (1991) 245–252
Rivest, R., Shamir, A., and Adleman, L.: A Method of Obtaining Digital Signatures and Public Key Cryptosystems. J. Commun. of ACM. 21 (1978) 120–126
Sauerbrey, J.: A Modular Exponentiation Unit Based on Systolic Arrays, In: Advances in Cryptology — AUSCRYPT’93, Lecture Notes in Computer Science, Vol. 718. Springer-Verlag (1993) 505–516
Shand, M., Vuillemin, J.: Fast Implementation of of RSA Cryptography. In: Proc. of the 11th IEEE Symposium on Computer Arithmetics (1993) 252–259
Tiountchik, A.A.: Systolic Modular Exponentiation via Montgomery Algorithm. J. Electronics Letters. 34 (1998) 874–875
Walter, C.D.: Systolic Modular Multiplication. IEEE Trans. on Comput. bf 42 (1993) 376–378
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2001 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Tiountchik, A., Trichina, E. (2001). Modular Exponentiation on Fine-Grained FPGA. In: Naccache, D. (eds) Topics in Cryptology — CT-RSA 2001. CT-RSA 2001. Lecture Notes in Computer Science, vol 2020. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45353-9_17
Download citation
DOI: https://doi.org/10.1007/3-540-45353-9_17
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-41898-6
Online ISBN: 978-3-540-45353-6
eBook Packages: Springer Book Archive