Abstract
This paper presents a new architecture model, named Weld, for VLIW processors. Weld integrates multithreading support into a VLIW processor to hide run-time latency effects that cannot be determined by the compiler. It does this through a novel hardware technique called operation welding that merges operations from different threads to utilize the hardware resources more efficiently. Hardware contexts such as program counters and fetch units are duplicated to support multithreading. The experimental results show that the Weld architecture attains a maximum of 27% speedup as compared to a single-threaded VLIW architecture. A MultiOp is a group of instructions that can be potentially executed in parallel.
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© 2001 Springer-Verlag Berlin Heidelberg
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Özer, E., Conte, T.M., Sharma, S. (2001). Weld: A Multithreading Technique Towards Latency-tolerant VLIW Processors. In: Monien, B., Prasanna, V.K., Vajapeyam, S. (eds) High Performance Computing — HiPC 2001. HiPC 2001. Lecture Notes in Computer Science, vol 2228. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45307-5_17
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DOI: https://doi.org/10.1007/3-540-45307-5_17
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