OpenMP Application Tuning Using Hardware Performance Counters

  • Nils Smeds
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2716)


Hardware counter events on some popular architectures were investigated with the purpose of detecting bottle-necks of particular interest to shared memory programming, such as OpenMP. A fully portable test suite was written in OpenMP, accessing the hardware performance counters be means of PAPI. Relevant events for the intended purpose were shown to exist on the investigated platforms. Further, these events could in most cases be accessed directly through their platform independent, PAPI pre-defined, names. In some cases suggestions for improvement in the pre-defined mapping were made based on the experiments.


Cache Line Local Cache Cache Coherency Memory Access Pattern Cache Coherency Protocol 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Nils Smeds
    • 1
  1. 1.Parallelldatorcentrum (PDC)Royal Institute of TechnologyStockholmSweden

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