Comprehensive Redundant Load Elimination for the IA-64 Architecture

  • Youngfeng Wu
  • Yong-fong Lee
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1863)


For IA-64 architecture, a compiler can aggressively utilize control and data speculation to increase instruction-level parallelism. Aggressive speculation normally generates many speculative (control-speculative) and advanced (data-speculative) loads with the same addresses. Traditional redundant load elimination handles only regular loads. It cannot be straightforwardly applied to removing speculative and advanced loads. In this paper, we present a framework for comprehensive redundant load elimination, which correctly handles all six types of the following loads: regular loads, advanced loads, check loads, check advanced loads, speculative loads, and speculative advanced loads. Our preliminary experimental results demonstrate that it is important to perform comprehensive redundant load elimination in a compiler for architectures supporting control and data speculation.


Critical Path Program Transformation Speculative Load Destination Register Program Point 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2000

Authors and Affiliations

  • Youngfeng Wu
    • 1
  • Yong-fong Lee
    • 1
  1. 1.Intel CorporationSanta Clara

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