Formally-Based Design Evaluation

  • Kenneth J. Turner
  • Ji He
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2144)


The paper investigates specification, verification and test generation for synchronous and asynchronous circuits. The approach is called Dill (Digital Logic in Lotos - the ISO Language Of Temporal Ordering Specification). Relations for (strong) conformance are defined to verify a design specification against a high-level specification. Tools have been developed for automated testing and verification of conformance between an implementation and its specification.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Kenneth J. Turner
    • 1
  • Ji He
    • 1
  1. 1.Computing Science and MathematicsUniversity of StirlingStirlingScotland

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