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Using Abstract Specifications to Verify PowerPC™ Custom Memories by Symbolic Trajectory Evaluation

  • Jayanta Bhadra
  • Andrew Martin
  • Jacob Abraham
  • Magdy Abadir
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2144)

Abstract

We present a methodology in which the behavior of a switch level device is specified using abstract parameterized regular expressions. These specifications are used to generate a finite automaton representing an abstraction of the behavior of a block of memory comprised of a set of such switch level devices. The automaton, in conjunction with an Efficient Memory Model [1], [2] for the devices, forms a symbolic simulation model representing an abstraction of the array core embedded in a larger design under analysis. Using Symbolic Trajectory Evaluation, we check the equivalence between a register transfer level description and a schematic description augmented with abstract specifications for one of the custom memories embedded in the MPC7450 PowerPC processor.

Keywords

Partial Order Regular Expression Complete Lattice Input String Input Symbol 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Jayanta Bhadra
    • 1
    • 2
  • Andrew Martin
    • 1
  • Jacob Abraham
    • 2
  • Magdy Abadir
    • 1
  1. 1.Motorola Inc.USA
  2. 2.The University of Texas at AustinUSA

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