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Proof Engineering in the Large: Formal Verification of Pentium®4 Floating-Point Divider

  • Roope Kaivola
  • Katherine Kohatsu
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2144)

Abstract

We examine the challenges presented by large-scale formal verification of industrial-size circuits, based on our experiences in verifying the class of all micro-operations executing on the floating-point division and square root unit of the Intel IA-32 Pentium®4 microprocessor. The verification methodology is based on combining human-guided mechanised theorem-proving with low-level steps verified by fully automated model-checking. A key observation in the work is the need to explicitly address the issues of proof design and proof engineering, i.e. the process of creating proofs and the craft of structuring and formulating them, as concerns on their own right.

Keywords

Model Check Theorem Prove Single Instruction Multiple Data Division Algorithm Divider Circuit 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Roope Kaivola
    • 1
  • Katherine Kohatsu
    • 1
  1. 1.Intel CorporationHillsboroUSA

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