Abstract
This work proposes a new elliptic curve processor architecture for the computation of point multiplication for curves defined over fields GF(p). This is a scalable architecture in terms of area and speed specially suited for memory-rich hardware platforms such a field programmable gate arrays (FPGAs). This processor uses a new type of high-radix Montgomery multiplier that relies on the precomputation of frequently used values and on the use of multiple processing engines.
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Keywords
- Elliptic Curve
- Arithmetic Unit
- Main Controller
- Elliptic Curve Cryptosystems
- Worcester Polytechnic Institute
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Orlando, G., Paar, C. (2001). A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware. In: Koç, Ç.K., Naccache, D., Paar, C. (eds) Cryptographic Hardware and Embedded Systems — CHES 2001. CHES 2001. Lecture Notes in Computer Science, vol 2162. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44709-1_29
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