The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems
Internet is becoming one of the key features of tomorrow’s communication world. The evolution of mobile phones networks, such as UMTS will soon allow everyone to be connected, everywhere. These new network technologies bring the ability to deal not only with classical voice or text messages, but also with improved content: multimedia. At the mobile level, this kind of data oriented content requires highly efficient architectures; and nowadays mobile system-on-chip solutions will no longer be able to manage the critical constraints like area, power and data computing efficiency. In this paper we will propose a new dynamically reconfigurable network, dedicated to data oriented applications such as the one allowed on third generation networks. Principles, realizations and comparative results will be exposed for some classical applications targeted on different architectures.
KeywordsMotion Estimation Clock Cycle Mean Absolute Difference Inverse Discrete Cosine Transform Reference Block
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