Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver

  • Lok-Kee Ting
  • Roger Woods
  • Colin Cowan
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2147)


This paper presents an FPGA solution for a high-speed front-end digital receiver of an Electronic Support Measures (ESM) system. An LMS-based adaptive predictor has been chosen to improve the signal-to-noise ratio (SNR) of the received radar signals. Two fine-grained pipelined architectures based on the Delay LMS (DLMS) algorithm have been developed for FPGA implementation. This paper also highlights the importance of choosing a suitable filter architecture in order to utilise FPGA resources resulting in a more efficient implementation. FPGA implementation results, including timing and area, are given and discussed.


Critical Path Adaptive Filter Filter Order FPGA Implementation Pipeline Architecture 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Lok-Kee Ting
    • 1
  • Roger Woods
    • 1
  • Colin Cowan
    • 1
  1. 1.School of Electrical and Electronic EngineeringThe Queen’s University of BelfastBelfastN. Ireland

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