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Placing, Routing, and Editing Virtual FPGAs

  • Löic Lagadec
  • Dominique Lavenier
  • Erwan Fabiani
  • Bernard Pottier
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2147)

Abstract

This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA. From a high level description of the FPGA architecture, the basic tools such a placer, a router or an editor are automatically generated. The description is not constrained by any model, so that abstract architectures, such as virtual FPGAs, can directly exploit the tool set as their basic programming tools.

Keywords

Virtual Machine Systolic Array Logic Block Programming Tool FPGA Device 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Löic Lagadec
    • 1
  • Dominique Lavenier
    • 2
  • Erwan Fabiani
    • 2
  • Bernard Pottier
    • 1
  1. 1.Université de Bretagne Occidentale - BrestFrance
  2. 2.IRISA / CNRS - RennesFrance

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