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Run-Time Optimized Reconfiguration Using Instruction Forecasting

  • Marios Iliopoulos
  • Theodore Antonakopoulos
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2147)

Abstract

The extensive use of reconfigurable computing devices has imposed a new category of processors, the dynamic instruction set processors (DISPs) that customize their instruction sets dynamically to the application needs. One of the major drawbacks of DISPs is the reconfiguration time needed to alter the instruction set, which is directly added to the program execution time discouraging the use of DISPs especially for time critical processing applications. This paper introduces a methodology for optimizing reconfiguration time through instruction forecasting and presents the results obtained when applying this method to Medium Access processing systems that execute time critical network tasks.

Keywords

Instruction Cache Dataflow Graph Partial Reconfiguration Reconfiguration Time DISP System 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Marios Iliopoulos
    • 1
    • 2
  • Theodore Antonakopoulos
    • 1
    • 2
  1. 1.Computers Technology Institute (CTT)PatrasGreece
  2. 2.Department of Electrical Engineering and Computers TechnologyUniversity of PatrasPatrasGreece

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