Abstract
During the last decade it has been shown that reconfigurable computing systems are able to compete with their non-reconfigurable counterparts in terms of performance, functional density or power dissipation. A couple of concept and prototyping studies have introduced the reconfigurability within general purpose microprocessor world. This paper introduces a prototyping environment for the design of simple reconfigurable microprocessors. The work differs from the previous approaches in the fact that a systematical way (concerning both hardware and software sides) to design, test and debug a class of reconfigurable computing cores instead of one particular application is discussed. First experiments with a simple 8 bit prototype have shown that the reconfiguration allows performance gains by a factor 2-28 for different applications. The study has discovered some directions for further architectural improvements.
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Sawitzki, S., Köhler, S., Spallek, R.G. (2001). Prototyping Framework for Reconfigurable Processors. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44687-7_2
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DOI: https://doi.org/10.1007/3-540-44687-7_2
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