Secure Configuration of Field Programmable Gate Arrays

  • Tom Kean
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2147)


Although SRAM programmed Field Programmable Gate Arrays (FPGA’s) have come to dominate the industry due to their density and performance advantages over non-volatile technologies they have a serious weakness in that they are vulnerable to piracy and reverse engineering of the user design. This is becoming increasingly important as the size of chips - and hence the value of customer designs - increases. FPGA’s are now being used in consumer products where piracy is more common. Further, reconfiguration of FPGA’s in the field is becoming increasingly popular particularly in networking applications and it is vital to provide security against malicious parties interfering with equipment functionality through this mechanism.


Field Programmable Gate Array Reverse Engineering User Design Configuration Memory FPGA Chip 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    Dipert, B., “Cunning Circuits Confound Crooks”, EDN Magazine, October 12, 2000.Google Scholar
  2. 2.
    Actel Corporation, “Protecting your Intellectual Property from the Pirates”, presentation at DesignCon’ 98. Available from
  3. 3.
    Xilinx Inc., “Using Bitstream Encryption”, in Chapter 2 of the Virtex II Platform FPGA Handbook available from
  4. 4.
    Steven A. Guccione, Delon Levi and Prasanna Sundararajan, “Jbits: A Java-based Interface for Reconfigurable Computing”. Proceedings 2nd Annual Military and Aerospace Applications of Programmable Devices and Technologies Conference (MAPLD).Google Scholar
  5. 5.
    Atmel Corp., “Atmel Introduces Secure FPLSIC”, Press Release, Atmel Corp, Oct 12, 2000.Google Scholar
  6. 6.
    Austin, K., US Patent 5,388,157 “Data Security Arrangements for Semiconductor Programmable Devices”Google Scholar
  7. 7.
    Algotronix Ltd., “Method and Apparatus for Secure Configuration of a Field Programmable Gate Array”, PCT Patent Application PCT/GB00/04988.Google Scholar
  8. 8.
    Erickson, C, US Patent 5,970,142 “Configuration Stream Encryption”Google Scholar
  9. 9.
    Sang, C, et al, US Patent 5,915,017 “Method and Apparatus for Securing Programming Data of Programmable Logic Device”Google Scholar
  10. 10.
    Actel Corp., “60RS Family SPGA’s”, Advanced Data Sheet. Available from
  11. 11.
    Kessner, D., “Copy Protection for SRAM based FPGA Designs”, Application Note, Free IP Project,
  12. 12.
    Algotronix Ltd., “Method of using a Mask Programmed Key to Securely Configure a Field Programmable Gate Array”, Unpublished pending patent application.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Tom Kean
    • 1
  1. 1.Algotronix ConsultingEdinburghUK

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