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Static Profile-Driven Compilation for FPGAs

  • Srihari Cadambi
  • Seth Copen Goldstein
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2147)

Abstract

We describe a static profiling methodology to extract hot-spots from netlists. Hot-spots are small regular sub-circuits the optimization of which has a big impact on the final result. We have built a tool that can extract and characterize hot-spots from large netlists very quickly. The tool can be used to direct human attention on portions of circuits that need hand-optimization, as well as to automatically direct efforts of FPGA tools. We show impressive throughput improvements when compiling to the PipeRench reconfigurable architecture and use hot-spots to enable fast architectural design space exploration for FPGAs by predicting the FPGA CLB structure that produces the best final area-delay. Our prediction is fairly accurate and only takes a few hours as compared to weeks for an exhaustive analysis. We also demonstrate better results when targeting FPGAs with heterogeneous CLBs.

Keywords

Field Programmable Gate Array Good Cluster Pipeline Stage Heterogeneous Cluster Human Attention 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2001

Authors and Affiliations

  • Srihari Cadambi
    • 1
  • Seth Copen Goldstein
    • 2
  1. 1.C&C Research LaboratoriesNEC USAPrincetonUSA
  2. 2.Carnegie Mellon UniversityPittsburghUSA

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