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Internet Connected FPL

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Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing (FPL 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1896))

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Abstract

In this paper we explore the design of internet-based systems using field-programmable logic (FPL). We describe results from designing a hardware platform that connects FPL directly to an internet. This hardware platform comprises an FPGA; an Ethernet interface; storage for static and dynamic configuration; and nonvolatile configuration logic. An important feature of our hardware platform design is the implementation of network protocols that allow transfer of both application and configuration data to and from an FPGA across an internet. We provide quantitative comparisons between the implementation of network protocols in programmable logic and implementations using general-purpose processors.

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References

  1. IDC http://www.idc.com:8080/Press/Archive/jun15c.htm

  2. Brebner, G. and N. Bergmann. 1999. Reconfigurable Computing in Remote and Harsh Environments. Ninth International Workshop on Field Programmable Logic and Applications (FPL99).

    Google Scholar 

  3. Lockwood, J. W., J. S. Turner, and D. E. Taylor. 2000. Field Programmable Port Extender (FPX) for Distributed Routing and Queuing. Eighth ACM International Symposium on Field-Programmable Gate Arrays (FPGA00).

    Google Scholar 

  4. Maly, K., C. Wild, C. M. Overstreet, H. Abdel-Wahab, A. Gupta, A. Youssef, E. Stoica, R. Talla, and A. Prabhu. Interactive Remote Instruction: Initial Experiences. 1996. Proceedings of the Conference on Integrating Technology into Computer Science Education.

    Google Scholar 

  5. McHenry, J., P. Dowd, T. Carrozzi, F. Pellegrino, and W. Cocks. 1997. An FPGA-Based Coprocessor for ATM Firewalls. The Fifth Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM97).

    Google Scholar 

  6. Miyazaki, T., K. Shirakawa, M. Katayama, T. Murooka, A. Takahara. 1998. A Transmutable Telecom System. International Workshop on Field Programmable Logic and Applications (FPL98).

    Google Scholar 

  7. Comer, D. E. 1995. Internetworking with TCP/IP Vol. I: Principles, Protocols, and Architecture. 3rd edition. Prentice Hall. ISBN: 0132169878.

    Google Scholar 

  8. Stevens, W. R. 1994. TCP/IP Illustrated, Vol. 1. The Protocols. Addison-Wesley. ISBN: 0201633469.

    Google Scholar 

  9. Level One Ethernet Transceiver. See http://www.level1.com/product/pdf/lxt970ad.pdf

  10. Kumar, S., L. Pires, S. Ponnuswamy, C. Nanavati, J. Golusky, M. Vojta, S. Wadi, D. Pandalai, and H. Spaanenburg. 2000. A Benchmark Suite for Evaluating Configurable Computing Systems—Status, Reflections, and Future Directions. Eighth ACM International Symposium on Field-Programmable Gate Arrays (FPGA00).

    Google Scholar 

  11. Microchip. See http://www.microchip.com/Download/Lit/PICmicro/12C5XX/40139e.pdf+

  12. IPIC. See http://www-ccs.cs.umass.edu/~shri/iPic.html

  13. Smith, M. J. S. 1997. Application-Specific Integrated Circuits. Reading, MA: Addison-Wesley. ISBN 0201500221. TK7874.6.S63.

    Google Scholar 

  14. Dolphin Flop805X Core. See http://www.support.xilinx.com/products/logicore/alliance/dolphin/flip805x-pr.pdf

  15. Synopsys 8051 Core. See http://www.synopsys.com/products/designware/8051_ds.html

  16. SuperTask RTOS. See http://www.ussw.com/products/supertask.

  17. CoreEl Fast MAC Cores. See http://www.xilinx.com/products/logicore/alliance/coreel/cs1100.pdf

  18. Express Logic ThreadX RTOS. See http://www.expresslogic.com/threadx.htmlL. ThreadX on an ARM7 is about 4 kbyte. ThreadX on an ARC processor is 4–25 kbyte.

  19. ESA, European Space Agency Leon SPARC V8 Development. See http://www.estec.esa.nl/wsmwww/leon/

  20. Xilinx Virtex family datasheet. See http://www.xilinx.com/partinfo/ds003.pdf and application note on parallel configuration, http://www.xilinx.com/xapp/xapp137.pdf

  21. RFC 691 FTP, RFC 768 UDP, RFC 783 TFTP, RFC 791 IP, RFC 793 TCP. See http://www.cis.ohio-state.edu/htbin/rfc/rfcXXX.html

  22. Comer, Douglas E. and. David L. Stevens. 1998. Internetworking With TCP/IP: Design, Implementation, and Internals. 3rd edition. Vol 2. Englewood Cliffs, NJ: Prentice Hall. ISBN: 0139738436

    Google Scholar 

  23. iReady Internet Tuner. See http://www.iready.com/products/internet-tuner.html

  24. Dallas Semiconductor. See http://www.dalsemi.com/DocControl/PDFs/87c520.pdf

  25. XCoNET. See http://www-ee.eng.hawaii.edu/~msmith/XCoNET/XCoNET.htm

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Author information

Authors and Affiliations

  1. Xilinx Inc, 2100 Logic Drive, San Jose, CA, 95124, USA

    Hamish Fallside

  2. University of Hawaii at Manoa, 2540 Dole Street, Honolulu, HI, 96822, USA

    Michael J. S. Smith

Authors
  1. Hamish Fallside
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  2. Michael J. S. Smith
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Editor information

Editors and Affiliations

  1. Computer Science Department, University of Kaiserslautern, P. O. Box. 30 49, 67653, Kaiserslautern, Germany

    Reiner W. Hartenstein

  2. Carinthia Tech Institute, Richard-Wagner-Str. 19, 9500, Villach, Austria

    Herbert Grünbacher

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© 2000 Springer-Verlag Berlin Heidelberg

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Fallside, H., Smith, M.J.S. (2000). Internet Connected FPL. In: Hartenstein, R.W., Grünbacher, H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44614-1_6

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  • DOI: https://doi.org/10.1007/3-540-44614-1_6

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-67899-1

  • Online ISBN: 978-3-540-44614-9

  • eBook Packages: Springer Book Archive

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