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Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform

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Power-Aware Computer Systems (PACS 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2008))

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Abstract

In this paper we propose several system-level transformations that allow to reduce the dynamic memory requirements of complex real-time multimedia systems. We demonstrate these transformations on the protocol layer of the MPEG4 IM1-player. As a consequence, up to 20% of the global power consumption of the protocol subsystem can be eliminated, which is significant due to the programmable processor target. The entire MPEG4 description is assumed to be mapped on a heterogeneous platform combining several software processors and hardware accelerators.

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References

  1. P. Marchal et al., “Large Impact of task-level concurrency transformations on the MPEG4 IM1 player for weakly parallel processor platforms”, Proc. PACT, Philadelphia PA, USA, Oct. 2000.

    Google Scholar 

  2. C. Ykman-Couvreur et al., “Stepwise Exploration and Specification Refinement of Telecom Network Systems”, accepted for IEEE Trans. on VLSI Systems, Vol.8, 2000.

    Google Scholar 

  3. F. Catthoor et al., “System-level data-flow transformation exploration and powerarea trade-offs demonstrated on video codecs”, special issue on “Systematic tradeoff analysis in signal processing systems design” (eds. M. Ibrahim, W. Wolf) in Journal of VLSI Signal Processing, Vol.18, No.1, Kluwer, Boston, pp.39–50, 1998.

    Google Scholar 

  4. F. Catthoor et al., “System-level data-flow transformations for power reduction in image and video processing”, Proc. Intnl. Conf. on Electronic Circuits and Systems, Greece, pp.1025–1028, Oct. 1996.

    Google Scholar 

  5. U. Banerjee, “Loop Transformations for Restructuring Compilers: the Foundations”, Kluwer, Boston, 1993.

    Google Scholar 

  6. A. Prayati et al., “Task concurrency management experiment for power-efficient speed-up of embedded MPEG4 player”, Proc. ICPP, Toronto, Canada, Aug. 2000.

    Google Scholar 

  7. N. Cossement et al., “DF*: An extension of synchronous dataflow with data dependency and non-determinism” accepted for Forum on Design Languages (FDL), Tuebingen, Germany, Sep. 2000.

    Google Scholar 

  8. “Information technology-Coding of audio-visual objects-Part 1: Systems” ISO/IEC 14496-1:1999(E)

    Google Scholar 

  9. B. Dave et al., “COHRA: hardware-software cosynthesis of hierarchical heterogeneous distributed embedded systems”,IEEE Trans. on Comp.-aided Design, Vol.CAD-17, No.10, pp.900–919, Oct. 1998.

    Article  Google Scholar 

  10. S. Ha et al., “Compile-time scheduling of dynamic constructs in dataflow program graphs”, IEEE Trans. on Computers, Vol.C-47, No.7, pp.768–778, July 1997.

    Article  MathSciNet  Google Scholar 

  11. I. Hong et al. “On-line scheduling of hard real-time tasks on variable voltage processor”, Proc. IEEE Int. Conf. on Comp. Aided Design, Santa Clara CA, pp.653–656, Nov. 1998.

    Google Scholar 

  12. K. Konstantinides et al. “Task allocation and scheduling models for multi-processor digital signal processing”, IEEE Trans. on Acoustics, Speech and Signal Processing, Vol.ASSP–38, No.12, pp.2151–2161, Dec. 1990.

    Article  Google Scholar 

  13. Y. Li et al.,, “Scheduling and allocation of single-chip multi-processors for multimedia”, Proc. IEEE Wsh. on Signal Processing Systems (SIPS), Leicester, UK, pp.97–106, Nov. 1997.

    Google Scholar 

  14. F. Catthoor et al., “Proposal for unified system design meta flow in task-level and instruction-level design technology research for multi-media applications”, Proc.ACM/IEEE Intnl. Symp. on System-Level Synthesis, Hsinchu, Taiwan, pp.89–95, Dec. 1998.

    Google Scholar 

  15. S. Sriram et al., “Determining the order of processor transactions in statically scheduled multiprocessors”, Journal of VLSI Signal Processing, No.15, Kluwer, Boston, pp.207–220, 1997.

    Google Scholar 

  16. F. Thoen et al., “Modeling, Verification and Exploration of Task-level Concurrency in Real-Time Embedded Systems”, ISBN 0-7923-7737-0, Kluwer Acad. Publ., Boston, 1999.

    Google Scholar 

  17. P. Eles et al., “Scheduling of conditional process graphs for the synthesis of embedded systems”, Proc. 1st ACM/IEEE Design and Test in Europe Conf., Paris, France, pp.132–138, Feb. 1998.

    Google Scholar 

  18. R. Dick et al., “CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems”, Proc. IEEE Int. Conf. Comp. Aided Design, Santa Clara CA, pp.62–68, Nov. 1998.

    Google Scholar 

  19. P. Hoang et al., “Scheduling of DSP programs onto multiprocessors for maximum throughput”, IEEE Trans. on Signal Processing, Vol.SP-41, No.6, pp.2225–2235, June 1993.

    Article  Google Scholar 

  20. W.H. Lee et al., “An efficient dynamic memory allocation policy based on empirical investigations”, Midwest Society Programming Languages and Systems Workshop,Chicago, IL,Oct. 9, 1999

    Google Scholar 

  21. J.M. Chang et al., “A high-performance memory allocator for object-oriented systems”, in IEEE Trans. on Comp., Vol.45, No.3, pp.357–366, 1996

    Article  MATH  Google Scholar 

  22. J.M. Chang et al, “Measuring Dynamic Memory Invocations in Object-oriented Programs”, Proc. IEEE Int. Conf. Computers and Communications, Phoenix AZ, Feb. 10-12, 1999. pp. 268–274

    Google Scholar 

  23. B. Zorn, D. Grunwald, “Empirical measurements of six allocation intensive C Programs”, Technical Report CU-CS-604-92, Department of computer science, Univ. of Colorado, Boulder CO, July, 1992

    Google Scholar 

  24. P.R. Wilson et al., “Dynamic storage allocation: a survey and critical review”, Technical Report, Department of computer science, Univ. of Texas, Austin TX, pp.5–32, 1995

    Google Scholar 

  25. J.L. da Silva Jr. et al., “Efficient system exploration and synthesis of applications with dynamic data storage and intensive data transfer.” Proceedings of the Design Automation Conference, June 1998.

    Google Scholar 

  26. F. Catthoor et al., Custom Memory Management Methodology-Exploration of Memory Organisation for Embedded Multimedia System Design. Kluwer Academic, Boston, 1998

    Google Scholar 

  27. K.D. Nilsen et al., “The real-time behavior of dynamic memory management in C++”, Proc. IEEE Real-Time Technology and Application Symposium, Chicago IL, May 1995

    Google Scholar 

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Author information

Authors and Affiliations

  1. IMEC, Kapeldreef 75, Leuven, Belgium

    P. Marchal, C. Wong, F. Catthoor, D. Verkest & H. De Man

  2. K.U.Leuven-ESAT, Leuven, Belgium

    P. Marchal, C. Wong, N. Cossement, F. Catthoor, R. Lauwereins & H. De Man

  3. Department of Electrical and Computer Engineering, University of Patras, Greece

    A. Prayati

Authors
  1. P. Marchal
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  2. C. Wong
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  3. A. Prayati
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  4. N. Cossement
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  5. F. Catthoor
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  6. R. Lauwereins
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  7. D. Verkest
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  8. H. De Man
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Editor information

Editors and Affiliations

  1. Department of Electrical and Computer Engineering, Carnegie Mellon University, 5000 Forbes Ave., PA 15213, Pittsburgh, USA

    Babak Falsafi

  2. School of Electrical and Computer Engineering, Purdue University, 1285 EE Building, IN 47907, W.Lafayette, USA

    T. N. Vijaykumar

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© 2001 Springer-Verlag Berlin Heidelberg

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Marchal, P. et al. (2001). Dynamic Memory Oriented Transformations in the MPEG4 IM1-Player on a Low Power Platform. In: Falsafi, B., Vijaykumar, T.N. (eds) Power-Aware Computer Systems. PACS 2000. Lecture Notes in Computer Science, vol 2008. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44572-2_4

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  • DOI: https://doi.org/10.1007/3-540-44572-2_4

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42329-4

  • Online ISBN: 978-3-540-44572-2

  • eBook Packages: Springer Book Archive

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