Advertisement

Symbolic Simulation with Approximate Values

  • Chris Wilson
  • David L. Dill
  • Randal E. Bryant
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 1954)

Abstract

Symbolic methods such as model checking using binary decision diagrams (BDDs) have had limited success in verifying large designs because BDD sizes regularly exceed memory capacity. Symbolic simulation is a method that controls BDD size by allowing the user to specify the number of symbolic variables in a test. However, BDDs still may blow up when using symbolic simulation in large designs with a large number of symbolic variables. This paper describes techniques for limiting the size of the internal representation of values in symbolic simulation no matter how many symbolic variables are present. The basic idea is to use approximate values on internal nodes; an approximate value is one that consists of combinations of the values 0, 1, and X. If an internal node is known not to affect the functionality being tested, then the simulator can output a value of X for this node, reducing the amount of time and memory required to represent the value of this node. Our algorithm uses categorization of the symbolic input variables to determine which node values can be more approximate and which can be more exact.

Keywords

Model Check Leaf Node Internal Node Unit Propagation Care Variable 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    V. Bertacco, M. Damiani, and S. Quer. Cycle-based symbolic simulation of gatelevel synchronous circuits. In Proc. of 36th Design Automation Conf., pages 391–396, 1999.Google Scholar
  2. 2.
    A. Biere, A. Cimatti, E. M. Clarke, M. Fujita, and Y. Zhu. Symbolic model checking using sat procedures instead of bdds. In Proc. of 36th Design Automation Conf., pages 317–320, 1999.Google Scholar
  3. 3.
    R. E. Bryant. Symbolic boolean manipulation with ordered binary decision diagrams. ACM Computing Surveys, 24(3):293–318, September 1992.CrossRefGoogle Scholar
  4. 4.
    H. Cho, G. Hachtel, E. Macii, B. Pleisser, and F. Somenzi. Algorithms for approximate fsm traversal based on state space decomposition. IEEE Trans. on Comp.-Aided Design of Integrated Circuits and Systems, 15(12):1465–1478, December 1996.CrossRefGoogle Scholar
  5. 5.
    M. Dalal. Efficient propositional constraint propagation. In Proc. of the Tenth National Conf. on Artificial Intelligence (AAAI-92), pages 409–414, 1992.Google Scholar
  6. 6.
    M. Davis, G. Logemann, and D. Loveland. Machine program for theorem-proving. Communications of the ACM, 5(7):394–397, 1962.zbMATHCrossRefMathSciNetGoogle Scholar
  7. 7.
    M. Ganai, A. Aziz, and A. Kuehlman. Augmenting simulation with symbolic algorithms. In Proc. of 36th Design Automation Conf., pages 385–390, 1999.Google Scholar
  8. 8.
    S. Govindaraju, D. L. Dill, A. J. Hu, and M. A. Horowitz. Approximate reachability with bdds using overlapping projections. In Proceedings of the 35th Design Automation Conference, June 1998. San Francisco, CA.Google Scholar
  9. 9.
    R. Ho and M. Horowitz. Validation coverage analysis for complex digital designs. In 1996 IEEE International Conference on Computer-Aided Design, pages 146–151, 1996.Google Scholar
  10. 10.
    P. Jain and G. Gopalakrishnan. Efficient symbolic simulation based verification using the paramteric form of boolean expressions. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 13(8):1005–1015, 1994.CrossRefGoogle Scholar
  11. 11.
    R. Jones, M. Aagard, and C.-J. Seger. Formal verification using parametric representations of boolean constraints. In Proc. of 36th Design Automation Conf., pages 402–407, 1999.Google Scholar
  12. 12.
    D. E. Long. Cmu bdd package, 1993.Google Scholar
  13. 13.
    D. Moundanos, J. A. Abraham, and Y. V. Hoskote. Abstraction techniques for validation coverage analysis and test generation. IEEE Transactions on Computers, 47(1):2–14, January 1998.CrossRefGoogle Scholar
  14. 14.
    K. Ravi, K. McMillan, T. Shiple, and F. Somenzi. Approximation and decomposition of binary decision diagrams. In Proc. of 35th Design Automation Conf., pages 445–450, 1998.Google Scholar
  15. 15.
    C.-J. Seger and R. E. Bryant. Formal verification by symbolic evaluation of partially-ordered trajectories. Formal Methods in System Design, 6(2):147–189, 1995.CrossRefGoogle Scholar
  16. 16.
    W.-D. Weber et al. The mercury interconnect architecture: A cost-effective infrastructure for high-performance servers. In Proc. of the 24th Annual Intl. Symp. on Computer Architecture (ISCA97), 1997.Google Scholar
  17. 17.
    C. Wilson and D. L. Dill. Reliable verification using symbolic simulation with scalar values. In Proceedings of the 37th Design Automation Conference, June 2000. Los Angeles, CA.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • Chris Wilson
    • 1
  • David L. Dill
    • 1
  • Randal E. Bryant
    • 2
  1. 1.Computer Systems LaboratoryStanford UniversityStanford
  2. 2.Computer Science Dept.Carnegie Mellon UniversityPittsburgh

Personalised recommendations