Abstract
A simple systolic array for achieving the effect of modular reduction, in linear time, is described. This circuit, in conjunction with Atrubin’s multiplier, performs modular multiplication in linear time.
On leave from Computer Science Dept., Technion, Haifa, Israel 32000. Csnet: even@cs_technion.ac.il
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5. References
Atrubin, A. J., “A One-Dimensional Real-Time Iterative Multiplier”, IEEE Tran. on Electronic Computers, Vol. 14, 1965, pp. 394–399.
Dusse, S. R., and B. S. Kaliski Jr., “A Cryptographic Library for the Motorola DSP 56000”, EuroCrypt 90-Abstracts, May 21–24, 1990, Scanticon, Arhus, Denmark, pp. 213–217.
Orup, H., Svendsen, E., and E. Andreasen, “VICTOR, An Efficient RSA Hardware Implementation”, EuroCrypt 90-Abstracts, May 21–24, 1990, Scanticon, Arhus, Denmark, pp. 219–227.
Montgomery, P. L., “Modular Multiplication Without Trial Division”, Math. of Computation, Vol. 44, 1985, pp. 519–521.
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© 1991 Springer-Verlag Berlin Heidelberg
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Even, S. (1991). Systolic Modular Multiplication. In: Menezes, A.J., Vanstone, S.A. (eds) Advances in Cryptology-CRYPTO’ 90. CRYPTO 1990. Lecture Notes in Computer Science, vol 537. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-38424-3_44
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DOI: https://doi.org/10.1007/3-540-38424-3_44
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