Abstract
This paper discusses some aspects regarding the use of universal linear threshold elements implemented in a standard double-poly CMOS technology, which might be used for neural networks as well as plain, or mixed-signal, analog and digital circuits. The 2-transistor elements can have their threshold adjusted in real time, and thus the basic Boolean function, by changing the voltage on one or more of the inputs. The proposed elements allow for significant reduction in transistor count and number of interconnections. This in combination with a power supply voltage in the range of less than 100 mV up to typically 1.0 V allow for Power-Delay-product improvements typically in the range of hundreds to thousands of times compared to standard implementations in a 0.6 micron CMOS technology. This makes the circuits more similar to biological neurons than most existing CMOS implementations. Circuit examples are explored by theory, SPICE simulations and chip measurements. A way of exploiting inherit fault tolerance is briefly mentioned. Potential improvements on operational speed and chip area of linear threshold elements used for perceptual tasks are shown.
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Aunet, S., Hartmann, M. (2003). Real-Time Reconfigurable Linear Threshold Elements and Some Applications to Neural Hardware. In: Tyrrell, A.M., Haddow, P.C., Torresen, J. (eds) Evolvable Systems: From Biology to Hardware. ICES 2003. Lecture Notes in Computer Science, vol 2606. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36553-2_33
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DOI: https://doi.org/10.1007/3-540-36553-2_33
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