Abstract
The evolution of digital circuits performing built-in self-test behaviour is attempted in simulation for a one bit adder and a two bit multiplier. Promising results show evolved designs can perform a better diagnosis using less resources than hand-designed equivalents. Future extensions of the approach could allow the self-diagnosis of analog circuits under failure and abnormal operating conditions.
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References
A. Avizienis and John P. J. Kelly. Fault-tolerance by design diversity: Concepts and experiments. Computer, 17(8):67–80, August 1984.
A. Avizienis. Design diversity and the immune system paradigm: Cornerstones for information system survivability, 2000.
D.W. Bradley and A.M. Tyrrell. Immunotronics: Novel finite state machine architectures with built in self test using self-nonself differentiation. IEEE Transactions on Evolutionary Computation, 6(3):227–238, 2001.
R O Canham and A M Tyrrell. A multilayered immune system for hardware fault tolerance within an embryonic array. In J Timmis and P J Bentley, editors, Proceedings of the 1st International Conference on Artificial Immune Systems (ICARIS), volume 1, pages 3–11, University of Kent at Canterbury, September 2002. University of Kent at Canterbury Printing Unit.
C. Dufaza. Theoretical properties of LFSRs for built-in self test. INTEGRATION, the VLSI journal, 25:17–35, 1998.
D. E. Goldberg. Genetic Algorithms in Search, Optimization & Machine Learning. Addison Wesley, 1989.
H. Golnabi and J. Provence. RMBITP: A reconfigurable matrix based built-in self-test processor. Microelectronics Journal, 28:115–127, 1997.
T. Higuchi, M. Iwata, and L. Weixin, editors. Proc. 1st Int. Conf. on Evolvable Systems: From Biology to Hardware, volume 1259 of LNCS. Springer-Verlag, 1997.
J. H. Holland. Adaptation in Natural and Artificial Systems. Ann Arbor: University of Michigan Press, 1975.
N. Jakobi. Half-baked, ad-hoc and noisy: Minimal simulations for evolutionary robotics. In Phil Husbands and Inman Harvey, editors, Proc. 4th Eur. Conf. on Artificial Life (ECAL’97), pages 348–357. MIT Press, 1997.
T. Kalganova. Bidirectional incremental evolution in extrinsic evolvable hardware. In J. Lohn, A. Stoica, and D. Keymeulen, editors, The Second NASA/DoD workshop on Evolvable Hardware, pages 65–74, Palo Alto, California, 13–15 2000. IEEE Computer Society.
J. R. Koza, F. H. Bennett III, D. Andre, and M. A. Keane. Reuse, parameterized reuse, and hierarchical reuse of substructures in evolving electrical circuits using genetic programming. In T. Higuchi, M. Iwata, and L. Weixin, editors, Proc. 1st Int. Conf. on Evolvable Systems: From biology to hardware (ICES-96), number 1259 in LNCS, pages 312–326. Springer-Verlag, 1996.
J. R. Koza. Genetic Programming: On the programming of computers by means of natural selection. MIT Press, Cambridge, Mass., 1992.
J. Lach, W. Mangione-Smith, and M. Potkonjak. Low overhead fault-tolerant FPGA systems, 1998.
P. Layzell. A new research tool for intrinsic hardware evolution. In M. Sipper, D. Mange, and A. Pérez-Uribe, editors, Proc. 2nd Int. Conf. on Evolvable Systems (ICES’98), volume 1478 of LNCS, pages 47–56. Springer-Verlag, 1998.
J. Lohn, A. Stoica, D. Keymeulen, and S. Colombano, editors. Proc. 2nd NASA/DoD workshop on Evolvable Hardware. IEEE Computer Society, 2000.
D. Mange, A. Stauffer, and G. Tempesti. Embryonics: A microscopic view of the molecular architecture. In A. Perez-Uribe M. Sipper, D. Mange, editor, Proc. 2nd Int. Conf. on Evolvable Systems (ICES1998: From biology to hardware, volume 1478 of LNCS, pages 285–195. Springer-Verlag, 1998.
J. F. Miller, D. Job, and Vesselin K. Vassilev. Principles in the evolutionary design of digital circuits—part I. Genetic Programming and Evolvable Machines, 1(3), 2000.
J. Miller, A. Thompson, P. Thomson, and T. Fogarty, editors. Proc. 3rd Int. Conf. on Evolvable Systems (ICES2000): From Biology to Hardware, volume 1801 of LNCS. Springer-Verlag, 2000.
J. Miller. On the filtering properties of evolved gate arrays. In A. Stoica, J. Lohn, and D. Keymeulen, editors, The First NASA/DoD Workshop on Evolvable Hardware, pages 2–11, Pasadena, California, 1999. Jet Propulsion Laboratory, California Institute of Technology, IEEE Computer Society.
W. Mangione-Smith N. Shnidman and M. Potkonjak. On-line fault detection for bus-based field programmable gate arrays. IEEE Transactions on VLSI systems, 6(4):656–666, 1998.
M. Sipper, D. Mange, and A. Pérez-Uribe, editors. Proc. 2nd Int. Conf. on Evolvable Systems (ICES98), volume 1478 of LNCS. Springer-Verlag, 1998.
A. Steininger. Testing and built-in self-test—a survey. Journal of Systems Architecture, 46:721–747, 200.
A. Stoica, D. Keymeulen, and J. Lohn, editors. Proc. 1st NASA/DoD workshop on Evolvable Hardware. IEEE Computer Society, 1999.
R. Tanese. Distributed genetic algorithms. In J.D. Schaffer, editor, Proc. of the Third International Conference of Genetic Algorithms, pages 434–439. Morgan Kauffmann, 1989.
A. Thompson, I. Harvey, and P. Husbands. Unconstrained evolution and hard consequences. In E. Sanchez and M. Tomassini, editors, Towards Evolvable Hardware: The evolutionary engineering approach, volume 1062 of LNCS, pages 136–165. Springer-Verlag, 1996.
A. Thompson and P. Layzell. Analysis of unconventional evolved electronics. Communications of the ACM, 42(4):71–79, April 1999.
P. Thomson. Circuit evolution and visualisation. In J. Miller, A. Thompson, P. Thomson, and T. Fogarty, editors, Proc. 3rd Int. Conf. on Evolvable Systems (ICES2000): From biology to hardware, volume 1801 of LNCS, pages 229–240. Springer-Verlag, 2000.
J. Torresen. A divide-and-conquer approach to evolvable hardware. Lecture Notes in Computer Science, 1478:57–--, 1998.
V. Vassilev, D. Job, and J. Miller. Towards the automatic design of more efficient digital circuits. In J. Lohn, A. Stoica, and D. Keymeulen, editors, The Second NASA/DoD workshop on Evolvable Hardware, pages 151–160, Palo Alto, California, 13–15 2000. IEEE Computer Society.
V. Vassilev and J. Miller. Scalability problems of digital circuit evolution: Evolvability and efficient designs. In J. Lohn, A. Stoica, and D. Keymeulen, editors, The Second NASA/DoD workshop on Evolvable Hardware, pages 55–64, Palo Alto, California, 13–15 2000. IEEE Computer Society.
H. Wunderlich. BIST for systems-on-a-chip. INTEGRATION, the VLSI journal, 26:55–78, 1998.
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Garvie, M., Thompson, A. (2003). Evolution of Self-diagnosing Hardware. In: Tyrrell, A.M., Haddow, P.C., Torresen, J. (eds) Evolvable Systems: From Biology to Hardware. ICES 2003. Lecture Notes in Computer Science, vol 2606. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36553-2_22
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DOI: https://doi.org/10.1007/3-540-36553-2_22
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