Design of Aliasing Free Space Compressor in BIST with Maximal Compaction Ratio Using Concepts of Strong and Weak Compatibilities of Response Data Outputs and Generalized Sequence Mergeability
This paper suggests a novel approach to designing aliasing free space compactors with maximal compaction ratio utilizing concepts of strong and weak compatibilities of response data outputs together with conventional switching theory concepts of cover table and frequency ordering for detectable single stuck line faults of the circuit under test (CUT), based on the assumption of generalized sequence mergeability. The advantages of aliasing free space compaction as developed in the paper over earlier techniques are obvious since zero aliasing is achieved here without any modifications of the CUT, while the area overhead and signal propagation delay are relatively less compared to conventional parity tree linear compactors. The approach used works equally well with both deterministic compacted tests and pseudorandom test sets.
KeywordsDetectable Fault Area Overhead Benchmark Circuit Circuit Under Test Deterministic Test
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