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Algorithms for Switch-Scheduling in the Multimedia Router for LANs

  • Indrani Paul
  • Sudhakar Yalamanchili
  • Jose Duato
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2552)

Abstract

The primary objective of the Multimedia Router (MMR) [1] project is to design and implement a single chip router targeted for use in cluster and LAN interconnection networks. The goal can be concisely captured in the phrase ‘QoS routing at link speeds’. This paper studies a set of algorithms for switch scheduling based on a highly concurrent implementation for capturing output port requests. Two different switch-scheduling algorithms called Row-Column Ordering and Diagonal Ordering are proposed and implemented in a switch-scheduling framework which involves a matrix data structure, and therefore enables concurrent and parallel operations at high-speed. Their performance has been evaluated with Constant Bit Rate (CBR), Variable Bit Rate (VBR), and a mixture of CBR and VBR traffic. At high offered loads both these ordering functions have been shown to deliver superior Quality of Service (QoS) to connections at a high scheduling rate and high utilization.

Keywords

Output Port Input Port Virtual Channel Selection Matrix Mixed Workload 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • Indrani Paul
    • 1
  • Sudhakar Yalamanchili
    • 1
  • Jose Duato
    • 2
  1. 1.Center for Experimental Research In Computer Systems School of Electrical and Computer EngineeringGeorgia Institute of TechnologyAtlanta
  2. 2.Dept. of Computer Engineering (DISCA)Univ. Politecnica de ValenciaValenciaSpain

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