A Programming Approach to the Design of Asynchronous Logic Blocks

  • Mark B. Josephs
  • Dennis P. Furey
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2549)


Delay-Insensitive Sequential Processes is a structured, parallel programming language. It facilitates the clear, succinct and precise specification of the way an asynchronous logic block is to interact with its environment. Using the tool di2pn, such a specification can be automatically translated into a Petri net. Using the tool petrify, the net can be automatically validated (for freedom from deadlock and interference, and for implementability as a speed-independent circuit) and asynchronous logic can be automatically synthesised.


Parallel Composition Logic Block Concrete Syntax Logic Synthesis Deadlock State 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2002

Authors and Affiliations

  • Mark B. Josephs
    • 1
  • Dennis P. Furey
    • 1
  1. 1.Centre for Concurrent Systems and Very Large Scale Integration School of Computing, Information Systems and MathematicsSouth Bank UniversityLondonUK

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