Skip to main content

The Min-Max Voronoi Diagram of Polygons and Applications in VLSI Manufacturing

  • Conference paper
  • First Online:
Algorithms and Computation (ISAAC 2002)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2518))

Included in the following conference series:

Abstract

We study the min-max Voronoi diagram of a set S of polygonal objects, a generalization of Voronoi diagrams based on the maximum distance between a point and a polygon. We show that the min-max Voronoi diagram is equivalent to the Voronoi diagram under the Haus-dorff distance function. We investigate the combinatorial properties of this diagram and give improved combinatorial bounds and algorithms. As a byproduct we introduce the min-max hull which relates to the min-max Voronoi diagram in the way a convex hull relates to the ordinary Voronoi diagram.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. M. Abellanas, G. Hernandez, R. Klein, V. Neumann-Lara, and J. Urrutia, Discrete Computat. Geometry 17, 1997, 307–318.

    Article  MATH  MathSciNet  Google Scholar 

  2. F. Aurenhammer, “Voronoi diagrams: A survey of a fundamental geometric data structure,” ACM Comput. Survey, 23, 345–405, 1991.

    Article  Google Scholar 

  3. L.L. Chen, S.Y. Chou, and T.C. Woo, 1993, ”Optimal parting directions for mold and die design,” Computer-Aided Design, Vol. 26, No. 12, pp.762–768.

    Article  Google Scholar 

  4. H. Edelsbrunner, L.J. Guibas, and M. Sharir, “The upper envelope of piecewise linear functions: algorithms and applications”, Discrete Computat. Geometry 4, 1989, 311–336.

    Article  MATH  MathSciNet  Google Scholar 

  5. R. Klein, “Concrete and Abstract Voronoi Diagrams”, vol. 400, Lecture Notes in Computer Science, Springer-Verlag, 1989.

    Google Scholar 

  6. R. Klein„, K. Melhorn, S. Meiser, “Randomized Incremental Construction of Abstract Voronoi diagrams”, Computational geometry: Theory and Aplications 3,1993, 157–184

    Article  Google Scholar 

  7. W. Maly, “Computer Aided Design for VLSI Circuit Manufacturability,” Proc. IEEE, vol.78, no.2, 356–392, Feb. 90.

    Google Scholar 

  8. C.H. Ouyang, W.A. Pleskacz, W. Maly, “Extraction of Critical Areas for Opens in Large VLSI Circuits”, IEEE Trans. on Computer-Aided Design, vol. 18, no 2, 151–162, February 1999.

    Article  Google Scholar 

  9. B. R. Mandava, “Critical Area for Yield Models”, IBM Technical Report TR22.2436, East Fishkill, NY, 12 Jan 1982.

    Google Scholar 

  10. E. Papadopoulou, “Plane sweep construction for the min-Max (Hausdorff) Voronoi diagram”, Manuscript in preparation.

    Google Scholar 

  11. E. Papadopoulou, “Critical Area Computation for Missing Material Defects in VLSI Circuits”, IEEE Transactions on Computer-Aided Design, vol. 20, no.5, May 2001, 583–597.

    Article  Google Scholar 

  12. E. Papadopoulou and D.T. Lee, “Critical Area Computation via Voronoi Diagrams”, IEEE Trans. on Computer-Aided Design, vol. 18, no.4, April 1999,463–474.

    Article  Google Scholar 

  13. E. Papadopoulou and D.T. Lee, “The L Voronoi Diagram of Segments and VLSI Applications”, International Journal of Computational Geometry and Applications, Vol. 11, No. 5, 2001, 503–528.

    Article  MATH  MathSciNet  Google Scholar 

  14. Preparata, F. P. and M. I. Shamos, Computational Geometry: an Introduction, Springer-Verlag, New York, NY 1985.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2002 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Papadopoulou, E., Lee, D. (2002). The Min-Max Voronoi Diagram of Polygons and Applications in VLSI Manufacturing. In: Bose, P., Morin, P. (eds) Algorithms and Computation. ISAAC 2002. Lecture Notes in Computer Science, vol 2518. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36136-7_45

Download citation

  • DOI: https://doi.org/10.1007/3-540-36136-7_45

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-00142-3

  • Online ISBN: 978-3-540-36136-7

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics