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Simulation and Measurement of Interconnects and On-Chip Passives: Gauge Fields and Ghosts as Numerical Tools

  • Conference paper
Progress in Industrial Mathematics at ECMI 2004

Part of the book series: Mathematics in Industry ((TECMI,volume 8))

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Summary

This paper describes the present status of using lattice gauge and ghost field methods for the simulation of on-chip interconnects and integrated passive components at low and high frequencies. Test structures have been developed and characterized in order to confront the simulation techniques with experimental data. The solution method gives results that are in agreement with the measurements.

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References

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Author information

Authors and Affiliations

  1. MAGWEL, Belgium

    Wim Schoenmaker, Peter Meuris, Erik Janssens & Michael Verschaeve

  2. austriamicrosystems, USA

    Ehrenfried Seebacher & Walter Pflanzl

  3. IMEC, Belgium

    Michele Stucchi, Bamal Mandeep & Karen Maex

  4. PHILIPS, The Netherlands

    Wil Schilders

Authors
  1. Wim Schoenmaker
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  2. Peter Meuris
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  3. Erik Janssens
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  4. Michael Verschaeve
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  5. Ehrenfried Seebacher
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  6. Walter Pflanzl
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  7. Michele Stucchi
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  8. Bamal Mandeep
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  9. Karen Maex
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  10. Wil Schilders
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Editor information

Editors and Affiliations

  1. Department of Mathematics and Computer Science, Technische Universiteit Eindhoven, Postbus 513, 5600 MB, Eindhoven, The Netherlands

    A. Di Bucchianico , R.M.M. Mattheij  & M.A. Peletier ,  & 

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© 2006 Springer-Verlag Berlin Heidelberg

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Cite this paper

Schoenmaker, W. et al. (2006). Simulation and Measurement of Interconnects and On-Chip Passives: Gauge Fields and Ghosts as Numerical Tools. In: Di Bucchianico, A., Mattheij, R., Peletier, M. (eds) Progress in Industrial Mathematics at ECMI 2004. Mathematics in Industry, vol 8. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-28073-1_6

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