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Xu Q, Qian H, Yin H, Jia L, Ji H, Chen B, Zhu Y, Liu M, Han Z, Hu H, Qiu Y, Wu D (2001) The Investigation of Key Technologies for Sub-0.1µm CMOS Device Fabrication. IEEE Trans On ED, vol 48, p 1412–1420
Wann C, Assaderaghi F, Shi L, Chan K, Cohen S, Hovel H, Jenkins K, Le Y, Sadana D, Viswanathan R, Wind S, Taur Y (1997) High-Performance 0.07-µm CMOS with 9.5-ps Gate Delay and 150 GHz fT. IEEE Elec Dev Lett, vol 18, p 625–627
Iwai H, Momose HS. Ultra-thin gate oxides-performance and reliability.
Ono M, Saito M, Yoshitomi T, Fiegna C, Ohguro T, Iwai H (1995) A 40-nm gate length n-MOSFET. IEEE Trans Elec Dev, vol 42, p 1822–1830
Taur Y, Mil YJ, Frank DJ, Wong HS, Buchanan DA, Wind SJ, Rishton SA, Sai-Halasz GA, Nowak EJ (1995) CMOS scaling into the 21st century: 0.1 µm and beyond. IBM J Res Develop, vol 39, p 245
Mikolajick T, Ryssel H (1993) Influence of Statistical Dopant Fluctuations on MOS Transistors with Deep Submicron Channel Lengths. Microelectronic Engineering vol 21, p 419
Mikolajick T, Ryssel H (1996) Der Einfluß statistischer Dotierungsschwankungen auf die minimale Kanallänge von Kurzkanal-MOS-Transistoren. ITG-Fachbericht 138 „Mikroelektronik für die Informationstechnik“, ISBN 3-8007-2171-6, p 183
Horstmann J, Hilleringmann U, Goser K (1998) Matching Analysis of Deposition Defined 50 nm MOSFETs. IEEE Transactions on Electron Devices, vol 45, p 299
Lakshmikumar KR, Hadaway RA, Copeland MA (1986) Characterization and Modeling of Mismatch in MOS Transistors for Precision Analog Design. IEEE Journal of Solid-State Circuits, vol SC-21, p 1057
Stolk PA, Schmitz J (1997) Fluctuations in Submicron CMOS Transistors. Proceedings of the Second Workshop on Innovative Circuits and Systems for Nano Electronics, Delft, The Netherlands, Sep 29–30, 1997, p 21
Wong HS, Taur Y (1993) Three-Dimensional “Atomistic” Simulation of Discrete Random Dopant Distribution Effects in Sub-0.1 µm MOSFETs. IEDM ‘93, Proceedings, Digest Technical Papers, Dec 5–8, 1993, p 705
Asenov A (1998) Random Dopant Threshold Voltage Fluctuations in 50 nm Epitaxial Channel MOSFETs: A 3D “Atomistic” Simulation Study. ESSDERC ‘98, Sep 8–10, 1998, Bordeaux, France, p 300
Skotnicki T (1996) Advanced Architectures for 0.18–0.12 µm CMOS Generations. Proceedings of the 26th European Solid State Device Research Conference ESSDERC’96, Sep 9–11, 1996, Bologna, Italy, p 505
Hellberg PE, Zhang SL, Petersson CS (1997) Work Function of Boron-Doped Polycrystalline SixGe1−x Films. Letters, vol 18, p 456
Wirth G (1999) Mesoscopic phenomena in nanometer scale MOS devices. Dissertation, Universität Dortmund
Wirth G, Hilleringmann U, Horstmann JT, Goser KF (1999) Mesoscopic Transport Phenomena in Ultrashort Channel MOSFETs. Solid-State Electronics, vol 43, p 1245
Wirth G, Hilleringmann U, Horstmann JT, Goser K (1999) Negative Differential Resistance in Ultrashort Bulk MOSFETs. Proceedings of the 25th Annual Conference of the IEEE Industrial Electronics Society IECON ‘99, Nov 29–Dec 3, 1999, San Jose (CA), ISBN 0-7803-5735-3, p 29
Behammer D (1996) Niedertemperaturtechnologie zur Herstellung von skalierfähigen Si/SiGe/Si-Heterobipolartransistoren. Dissertation, Universität Bochum
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(2005). Extension of Conventional Devices by Nanotechniques. In: Fahrner, W.R. (eds) Nanotechnology and Nanoelectronics. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-26621-6_8
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DOI: https://doi.org/10.1007/3-540-26621-6_8
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