Graph grammar based specification of interconnection structures for massively parallel computation

Abstract

Algorithms designed for highly parallel processing often require specific interprocess communication topologies, including vectors, meshes, trees, toruses and cubeconnected structures. Static communication structures are naturally expressed as graphs with regular properties, but this level of abstraction is not supported in current environments. Our approach to programming massively parallel processors involves a graph editor, which allows the programmer to specify communication structures graphically. As a foundation for graph editor operations, we are currently investigating properties of aggregate rewriting graph grammars which rewrite, in parallel, aggregates of nodes whose labels are logically related. We have found these grammars to be efficient in their description of many recursively defined graphs. Languages generated by these grammars can be associated with families of graphs. We also suggest extensions to the formalism that make use of extended labeling information that would be available in graph editors.

The Parallel Programming Environments Project at the University of Massachusetts is supported by the Office of Naval Research, contract N000014-84-K-0647. Duane Bailey was also supported by an American Electronics Association Computer Vision fellowship.