Abstract
We develop mathematical switch-level models for static combinational CMOS networks. In contrast to other available MOS models and theories, our models capture design principles that are special to CMOS, such as the use of transmission gates. First we study networks consisting of cascade connections of CMOS cells realizing negative functions. We then extend this model to incorporate transmission gates. Finally, we develop a more complex CMOS graph model which includes a ternary transient analysis and is capable of handling some unconventional, but commercially used, combinational networks. Such designs cannot be properly explained by presently available theories. Also, we discuss several general design approaches.
This research was supported by the Natural Sciences and Engineering Research Council of Canada under grant No. A0871.
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© 1986 Springer-Verlag Berlin Heidelberg
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Brzozowski, J.A., Yoeli, M. (1986). Combinational static CMOS networks. In: Makedon, F., Mehlhorn, K., Papatheodorou, T., Spirakis, P. (eds) VLSI Algorithms and Architectures. AWOC 1986. Lecture Notes in Computer Science, vol 227. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16766-8_25
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DOI: https://doi.org/10.1007/3-540-16766-8_25
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