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Aegean Workshop on Computing

AWOC 1986: VLSI Algorithms and Architectures pp 1–11Cite as

Digital filtering in VLSI

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 227))

Abstract

In this paper we take a first step in the study of VLSI realizations of digital filtering. For increasing input rate. processing is feasible only by resorting to massive parallelism, i.e., to an nq-th extension of the original order-n filter. We show that the operation is reducible to convolutions with fixed n-vectors and propose to realize the computation by means of the twisted-reflected-tree, a network naturally suited for prefix computation. We discuss the issues of precision and operand length, and illustrate the arising area/data-rate/delay trade-offs.

(Invited Paper)

This work was supported in part by National Science Foundation Grant ECS-84-10902 and by the Joint Services Electronics Program under contract N00014-84-C-0149.

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References

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Author information

Authors and Affiliations

  1. Department of Computer Science, Cornell University, 14853, Ithaca, NY

    G. Bilardi

  2. Departments of Electrical and Computer Engineering and of Computer Science, Coordinated Science Laboratory, University of Illinois, 61801, Urbana, IL

    F. P. Preparata

Authors
  1. G. Bilardi
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  2. F. P. Preparata
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Editor information

Filia Makedon Kurt Mehlhorn T. Papatheodorou P. Spirakis

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© 1986 Springer-Verlag Berlin Heidelberg

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Bilardi, G., Preparata, F.P. (1986). Digital filtering in VLSI. In: Makedon, F., Mehlhorn, K., Papatheodorou, T., Spirakis, P. (eds) VLSI Algorithms and Architectures. AWOC 1986. Lecture Notes in Computer Science, vol 227. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16766-8_1

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  • DOI: https://doi.org/10.1007/3-540-16766-8_1

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-16766-2

  • Online ISBN: 978-3-540-38746-6

  • eBook Packages: Springer Book Archive

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