VLSI mesh of trees for data base processing

Abstract

The VLSI chips introduced in preceding sections can be combined to construct a data base machine.

In order to execute all the operations required in a data base transaction or set of transactions a control processor to coordinate the MT devices is needed.

The control processor has to generate instructions for the MT's and to supervise their execution. Besides, it has to control the flow of data between SMT's, PMT's and Mass Storage. A straightforward architecture of such a system is illustrated in figure 2. We note that several PMT's are required both to enhance the parallelism of processing and to provide interconnection between SMT's and PMT's.

As a final note, we point out that the state of the art of VLSI technology imposes severe limitations on the size of MT's and, consequently on the size of data bases that can be stored or processed, in these elements. Although it can be expected that these limitations will eventually be overcome by the progress of technology, a relevant problem is how to extend the results given in this paper in order to deal with the case where relations exceed the size of SMT's and PMT's.

This result could be achieved by assuming that large relations be partitioned in several parts; high level operations be performed on the parts and the resulting relation be later recomposed from parts.

An efficient strategy to obtain this result, still sublinear in terms of time complexity, is currently under investigation.

This work has been supported by a Research Grant from Ministero della Pubblica Istruzione of Italy.