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Sagamore Computer Conference

SCC 1974: Parallel Processing pp 372–382Cite as

Architectural considerations in interfacing a parallel processor to the air traffic control system

  • Session 10: Parallel Processor Architectures For Air Traffic Control
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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 24))

Abstract

Interfacing of parallel processors and other special purpose computers to a general purpose host is a very important consideration in effectively using these processors. This paper describes how a parallel processor configuration is connected to a host machine, in this case an ARTS III(a) multiprocessor system. The constraints leading to the configuration are first presented. Then we give descriptions of the matched hardware and software interfaces which ensure that the full capabilities of the processors can be utilized and that the cost and risk of developing the system is minimized. This paper presents only one experience in designing a parallel processor to host computer interface, but some of the considerations encountered in this experience will be applicable to other such interface attempts.

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References

  1. H.G. Schmitz, and C. Huang, "An Efficient Implementation of Conflict Prediction in a Parallel Processor", Proc. 1974 Sagamore Computer Conference on Parallel Processing.

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  2. R.O. Berg, S.J. Nuspl, and H.G. Schmitz, "PEPE — An Overview of Architecture, Operation and Implementation", National Electronics Conf. Proceedings (Sept. 1972).

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  3. J.A. Githens, "A Fully Parallel Computer for Radar Data Processing," NAECON (May 1970).

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  4. W. Walther, "Multiprocessor Self Diagnosis, Surgery and Recovery in Air Traffic Control," ACM Operating Systems Review, 7, No. 4, (October 1973).

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  5. S.J. Einhorn, "Reliability Prediction for Repairable Redundant Systems," Proceedings of the IEEE (February 1963).

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  6. R.O. Berg, et al, "Approaches to Custom LSI," U.S. Air Force Systems Development Command, Air Force Avionics Laboratory Technical Report, AFAL-TR-73-16, (April 1973), pp. 191.

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Author information

Authors and Affiliations

  1. Honeywell Systems & Research Center, 55413, Minneapolis, Minnesota

    W. L. Heimerdinger, G. F. Muething, S. J. Nuspl & L. B. Wing

Authors
  1. W. L. Heimerdinger
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  2. G. F. Muething
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  3. S. J. Nuspl
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  4. L. B. Wing
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Editor information

Tse-yun Feng

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© 1975 Springer-Verlag Berlin Heidelberg

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Heimerdinger, W.L., Muething, G.F., Nuspl, S.J., Wing, L.B. (1975). Architectural considerations in interfacing a parallel processor to the air traffic control system. In: Feng, Ty. (eds) Parallel Processing. SCC 1974. Lecture Notes in Computer Science, vol 24. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-07135-0_136

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  • DOI: https://doi.org/10.1007/3-540-07135-0_136

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-07135-8

  • Online ISBN: 978-3-540-37408-4

  • eBook Packages: Springer Book Archive

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