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A control structure for parallel processing

  • Session 4: System Control
  • Conference paper
  • First Online:
Parallel Processing (SCC 1974)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 24))

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Abstract

This paper describes a control structure for the control of parallel processors such that (1) at most one of the processors is engaged in its ‘critical section’ at any instant and (2) if a processor wants to enter a critical section it is eventually allowed to do so. The solution is described using APL programs and flowcharts. It does not assume the existence of ‘indivisible’ operations like ‘TS’ instruction of SYSTEM/360. It is observed that to control ‘N’ processors the number ‘M’ of ‘N-WAY’ switches required is given by:

$$M \geqslant 2 + \frac{{Ln{\mathbf{ }}(n - 1)}}{{Ln{\mathbf{ }}2}}$$

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References

  1. E.W. Dijkstra, "Solution of a problem in concurrent programming control," Communications of ACM, Vol. 8, (September 1965), pp. 569.

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Authors and Affiliations

  1. Moore School of Electrical Engineering, University of Pennsylvania, 19104, Philadelphia, Pa.

    Subramanya K. Shastry

Authors
  1. Subramanya K. Shastry
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Editor information

Tse-yun Feng

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© 1975 Springer-Verlag Berlin Heidelberg

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Shastry, S.K. (1975). A control structure for parallel processing. In: Feng, Ty. (eds) Parallel Processing. SCC 1974. Lecture Notes in Computer Science, vol 24. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-07135-0_116

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  • DOI: https://doi.org/10.1007/3-540-07135-0_116

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-07135-8

  • Online ISBN: 978-3-540-37408-4

  • eBook Packages: Springer Book Archive

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