Abstract
Correct branch prediction is an essential task in modern microarchitectures. In this paper, to additionally increase the prediction accuracy, recovery logics for speculative update branch history are presented. In local or global branch predictors, maintaining speculative update history provides substantial prediction accuracy. However, speculative update history requires a suitable recovery mechanism. This paper proposes recovery logics for speculative update branch history, for both global- and local-history. The proposed solutions provide higher prediction accuracy and guarantee the correctness of program, and they can be efficiently implemented with low hardware costs.
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References
Hennessy, J.L., Patterson, D.A.: Computer Architecture: A Quantitative Approach, 3rd edn. Morgan Kaufmann Publishers, San Francisco (2001)
Intel XScale Core Developer’s Manual (January 2004)
Furber, S.: ARM System-on-Chip Architecture, 2nd edn. Addison-Wesley, Reading (2000)
Yeh, T.Y., Patt, Y.N.: Two-level adaptive branch prediction. In: Proceedings of the 24th ACM/IEEE International Symposium on Microarchitecture, pp. 51–61 (1991)
Hao, E., Chang, P.-Y., Patt, Y.: The effect of speculatively updating branch history on branch prediction accuracy, revisited. In: Proc. of the 27th MICRO, November 1994, pp. 228–232 (1994)
Seznec, A., Felix, S., Krishnan, V., Sazeid‘es, Y.: Design tradeoffs for the ev8 branch predictor. In: Proc. of the 29th ISCA, May 2002, pp. 295–306 (2002)
McFarling, S.: Combining branch predictors. Tech. Rep. TN-36m, Digital Western Research Lab (June 1993)
Kwak, J.W., Kim, J.-H., Jhon, C.S.: The Impact of Branch Direction History combined with Global Branch History in Branch Prediction. IEICE Transactions on Information and System E88-D(7), 1754–1758 (2005)
Tarjan, D., Skadron, K.: Merging path and gshare indexing in perceptron branch prediction. ACM Transactions on Architecture and Code Optimization (TACO) 2(3) (September 2005)
Skadron, K., Martonosi, M., Clark, D.: Speculative updates of local and global branch history: A quantitative analysis. JILP 2 (January 2000)
Burger, D., Austin, T.M., Bennett, S.: Evaluating future micro-processors: the SimpleScalar tool set, Tech. Report TR-1308, Univ. of Wisconsin-Madison Computer Sciences Dept. (1997)
SPEC CPU2000 Benchmarks, http://www.specbench.org
Jimenez, D.A., Keckler, S.W., Lin, C.: The impact of delay on the design of branch predictors. In: Proc. 33rd Int’l Symp. on Microarchitecture, pp. 67–76 (2000)
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© 2006 Springer-Verlag Berlin Heidelberg
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Kwak, J.W., Jhon, C.S. (2006). Recovery Logics for Speculative Update Global and Local Branch History. In: Levi, A., Savaş, E., Yenigün, H., Balcısoy, S., Saygın, Y. (eds) Computer and Information Sciences – ISCIS 2006. ISCIS 2006. Lecture Notes in Computer Science, vol 4263. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11902140_29
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DOI: https://doi.org/10.1007/11902140_29
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-47242-1
Online ISBN: 978-3-540-47243-8
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