Abstract
This paper presents a methodology of parallel implementations design that starts with abstract sequential descriptions of complex systems when no any parallel solutions have been taken and solves dynamically at real input data very complex tasks that are typical for system-level design. Critical path and parallelization potential based profiling of large sequential algorithms on data flow execution graphs is the kernel of methodology that enables to search for optimal (sub-optimal) parallel implementation solutions at very abstract level of design flow. Experimental results obtained on the critical path and parallelization potential based profiling of MPEG4 video codec and subsequent performance analysis of possible parallel implementations prove usefulness and effectiveness of the developed methodology and tool.
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References
Juarez, E., Mattavelli, M., Mlynek, D.: A System-on-a-chip for MPEG-4 Multimedia Stream Processing and Communication. In: IEEE International Symposium on Circuits and Systems, Geneva, Switzerland, May 28-31 (2000)
Cho, Y., Choi, K., Zergainoh, N.-E., Jerraya, A.A.: Scheduler Implementation in MP SoC Design. In: Asia South Pacific Design Automation Conference, Shangai, China (2005)
Gupta, R., De Micheli, G.: Constrained Software Synthesis for Embedded Applications. EUROMICRO Journal 43, 557–586 (1997)
Liu, L., Du, D., Chen, H.-C.: An Efficient Parallel Critical Path Algorithm. IEEE Trans. on Computer Aided Design 13(7), 909–919 (1994)
Prihozhy, A., Mattavelli, M., Mlynek, D.: Data Dependences Critical Path Evaluation at C/C++ System Level Description. In: Chico, J.J., Macii, E. (eds.) PATMOS 2003. LNCS, vol. 2799, pp. 569–579. Springer, Heidelberg (2003)
Prihozhy, A., Mattavelli, M., Mlynek, D.: Evaluation of Parallelization Potential for Efficient Multimedia Implementations: Dynamic Evaluation of Algorithm Critical Path. IEEE Trans. on Circuit and Systems for Video Technology 15(5) (May 2005)
Barford, P., Crovella, M.: Critical Path Analysis of TCP Transactions. IEEE/ACM Transactions on Networking 9(3), 238–248 (2001)
Lucke, L., Parhi, K.: Data-Flow Transformations for Critical Path Time Reduction in High-Level DSP Synthesis. IEEE Trans. on Computer Aided Design 12(7), 1063–1068 (1993)
Hollingsworth, J.: Critical Path Profiling of Message Passing and Shared-Memory Programs. IEEE Trans. on Parallel and Distr. Systems 9(10), 1029–1040 (1998)
Prihozhy, A.: High-Level Synthesis through Transforming VHDL Models. In: System-on-Chip Methodologies and Design Languages, pp. 135–146. Kluwer Academic Publishers, Dordrecht (2001)
Prihozhy, A.: Net Scheduling in High-Level Synthesis. IEEE Design & Test of Computers, 24–33 (spring, 1996)
Prihozhy, A., Mlynek, D., Solomennik, M., Mattavelli, M.: Techniques for Optimization of Net Algorithms. In: Parallel Computing in Electrical Engineering, pp. 211–216. IEEE CS Press, Los Alamitos (2002)
Ravasi, M., Mattavelli, M.: High Abstraction Level Complexity Analysis and Memory Architecture Simulations for Multimedia Algorithms. IEEE Trans. on Circuits and Systems for Video Technology 15(5) (May 2005)
Mattavelli, M., Brunetton, S.: Implementing Real-Time Video Decoding on Multimedia Processors by Complexity Prediction Techniques. IEEE Trans. Consumer Electron. 44(3), 760–767 (1998)
Prihozhy, A., Mattavelli, M., Mlynek, D.: Analyses of Critical Path and Parallelization Potential of MPEG-4 Reference Software, Technical Report, Swiss Federal Institute of Technology, LTS3, No D108, 60 p. (September 2004)
ISO/IEC, Information technology – Coding of audio visual objects – Part 2 Visual, ISO/IEC International Standard 14496-2 (MPEG-4)
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Prihozhy, A., Mlynek, D. (2006). Design of Parallel Implementations by Means of Abstract Dynamic Critical Path Based Profiling of Complex Sequential Algorithms. In: Vounckx, J., Azemard, N., Maurine, P. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2006. Lecture Notes in Computer Science, vol 4148. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11847083_1
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DOI: https://doi.org/10.1007/11847083_1
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