Updates on the Security of FPGAs Against Power Analysis Attacks

  • F. -X. Standaert
  • F. Mace
  • E. Peeters
  • J. -J. Quisquater
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3985)


This paper reports on the security of cryptographic algorithms implemented on FPGAs against power analysis attacks. We first present some improved experiments against these reconfigurable devices, due to an improved measurement process. Although it is usually believed that FPGAs are noisy targets for such attacks, it is shown that simple power consumption models can nearly perfectly correlate with actual measurements. Then, we evaluate how these correlation values depend on the resources used in the FPGAs. Finally, we investigate the possibility to counteract these attacks by using random pre-charges in the devices and determine how this technique allows a designer to increase the security of an implementation. These results confirm that side-channel attacks present a serious threat for most microelectronic devices, including FPGAs. To conclude, we discuss the security vs. efficiency tradeoffs.


Power Consumption Smart Card Block Cipher FPGA Implementation Power Trace 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2006

Authors and Affiliations

  • F. -X. Standaert
    • 1
  • F. Mace
    • 1
  • E. Peeters
    • 1
  • J. -J. Quisquater
    • 1
  1. 1.UCL Crypto GroupLouvain-la-NeuveBelgium

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