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Minimising the Energy Consumption of Real-Time Tasks with Precedence Constraints on a Single Processor

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Embedded and Ubiquitous Computing (EUC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 4096))

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Abstract

Energy-aware task scheduling is critical for real-time embedded systems. Although dynamic power has traditionally been a primary source of processor power consumption, leakage power is becoming increasingly important. In this paper, we present two optimal energy-aware polynomial-time algorithms for scheduling a set of tasks with release times, deadlines and precedence constraints on a single processor with continuous voltages. Our algorithms are guaranteed to minimise the total energy consumption of all tasks while minimising their maximum lateness under two power models: the dynamic power model where the dynamic power dominates the processor power consumption and the dynamic and leakage power model where both dynamic power and leakage power are significant sources of the processor power consumption. The time complexities of both algorithms are O(n 3) , where n is the number of tasks.

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References

  1. Yao, F., Demers, A., Schenker, S.: A Scheduling Model for Reduced CPU Energy. In: The proceedings of Annual Symposium on Foundation of Computer Science, pp. 374–382 (1995)

    Google Scholar 

  2. Li, M., Yao, F.: An Efficient Algorithm for Computing Optimal Discrete Voltage Schedules. Siam Journal on Computing 35(3), 658–671 (2005)

    Article  MathSciNet  Google Scholar 

  3. Ishihara, T., Yasuura, H.: Voltage Scheduling Problem for Dynamically Variable Voltage Processors. In: Proceedings of International Symposium on Low Power Electronics and Design, pp. 197–202 (1998)

    Google Scholar 

  4. Hong, I., Potkonjak, M., Srivastava, M.B.: On-line Scheduling of Hard Real-Time Tasks on Variable Voltage Processor. In: Proceedings of International Conference on Computer-Aided Design, November 1998, pp. 458–470 (1998)

    Google Scholar 

  5. Sinha, A., Chandrakasan, A.P.: Energy Efficient Real-Time Scheduling. In: Proceedings of International Conference on Computer-Aided Design, pp. 458–470 (2001)

    Google Scholar 

  6. Quan, G., Hu, X.: Energy Efficient Fixed-Priority Scheduling for Real-Time Systems on Variable Voltage Processors. In: Proceedings of Design Automation Conference, pp. 828–833 (2001)

    Google Scholar 

  7. Zhang, Y., Hu, X.S., Chen, D.: Task Scheduling and Voltage Selection for Energy Minimisation. In: Proceedings of Design Automation Conference (June 2002)

    Google Scholar 

  8. Quan, G., Niu, L., Xiaobo Sharon, H., Mochocki, B.: Fixed Priority Scheduling for Reducing Overall Energy on Variable Voltage Processors. In: Proceedings of Real-Time Systems Symposium (2004)

    Google Scholar 

  9. Shin, D., Kim, J., Lee, S.: Low-Energy Intra-Task Voltage Scheduling Using Static Timing Analysis. In: Proceedings of Design Automation Conference, June, pp. 438–443 (2001)

    Google Scholar 

  10. Martin, S.M., Flautner, K., Mudge, T., Blauuw, D.: Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Low Power Microprocessors under Dynamic Workloads. In: Proceedings of International Conference on Computer-Aided Design, November 2002, pp. 721–725 (2002)

    Google Scholar 

  11. Yan, L., Luo, J., Jha, N.K.: Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-Time Embedded Systems. In: Proceedings of 2003 International Conference on Computer-Aided Design, November 2003, pp. 30–38 (2003)

    Google Scholar 

  12. Andrei, A., Schmitz, M., Eles, P., Peng, Z., Al-Hashimi, B.M.: Overhead-Conscious Voltage Selection for Dynamic and Leakage Energy Reduction of Time-Constrained Systems. In: Proceedings of 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), pp. 518–525 (2004)

    Google Scholar 

  13. Jejurikar, R., Pereira, C., Gupta, R.K.: Leakage aware dynamic voltage scaling for real-time embedded systems. In: Proceedings of Design Automation Conference, June, pp. 275–280 (2004)

    Google Scholar 

  14. Jejurikar, R., Gupta, R.K.: Procrastination scheduling in fixed priority real-time systems. In: Proceedings of ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems, June, pp. 57–66 (2004)

    Google Scholar 

  15. Yun, H.-S., Kim, J.: On Energy-Optimal Voltage Scheduling for Fixed Priority Hard Real-Time Systems. ACM Transactions on Embedded Computing Systems 2(3), 393–430 (2003)

    Article  Google Scholar 

  16. Kwon, W.-C., Kim, T.: Optimal Voltage Allocation Techniques for Dynamically Variable Voltage Processors. ACM Transactions on Embedded Computing Systems 4(1), 211–230 (2005)

    Article  Google Scholar 

  17. Weste, N.H.E., Eshraghian, K.: Principle of CMOS VLSI Design. Addison-Wesley, Reading (1993)

    Google Scholar 

  18. http://www-device.eecs.berkley.edu/~ptm/introduction.html

  19. Brucker, P.: Scheduling Algorithms. Springer, Heidelberg (2004)

    MATH  Google Scholar 

  20. Boyd, S., Vandenberghe, L.: Convex Optimisation. Cambridge University Press, Cambridge (2001)

    Google Scholar 

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© 2006 Springer-Verlag Berlin Heidelberg

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Wu, H., Parameswaran, S. (2006). Minimising the Energy Consumption of Real-Time Tasks with Precedence Constraints on a Single Processor. In: Sha, E., Han, SK., Xu, CZ., Kim, MH., Yang, L.T., Xiao, B. (eds) Embedded and Ubiquitous Computing. EUC 2006. Lecture Notes in Computer Science, vol 4096. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11802167_7

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  • DOI: https://doi.org/10.1007/11802167_7

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-36679-9

  • Online ISBN: 978-3-540-36681-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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