Abstract
Software frameworks offer sets of reusable and adaptable compo-nents embedded within an architecture optimized for a given target domain. This paper introduces an approach to the design of software frameworks for real-time applications. Real-Time applications are characterized by functional and non-functional (e.g. timing) requirements. The proposed approach separates the treatment of these two aspects. For functional issues, it defines an extensible state machine concept to define components that encapsulate functional behaviour and offer adaptation mechanisms to extend this behaviour which warrant preservation of the functional properties that characterize the framework. For timing issues, it defines software structures that are provably endowed with specific timing properties and which encapsulate functional activity in a way that warrants their enforcement. A UML2 profile is defined that formally captures both aspects and allows the proposed strategy to be deployed at design level.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Pasetti, A.: Software Frameworks and Embedded Control Systems. LNCS, vol. 2231, p. 29. Springer, Heidelberg (2002)
Wang, F.: Formal verification of timed systems: A survey and perspective. Proceedings of the IEEE 92(8), 1283–1305 (2004)
Cechticky, V., Pasetti, A., Rohlik, O., Schaufelberger, W.: XML-Based Feature Modelling. In: Bosch, J., Krueger, C. (eds.) ICOIN 2004 and ICSR 2004. LNCS, vol. 3107, pp. 101–114. Springer, Heidelberg (2004)
Cechticky, V., Pasetti, A., Rohlik, O., Vardanega, T.: Automated proof-based System and Software Engineering for Real-Time Applications: Framework Design Report. Technical Report (2005) Available at ASSERT project website: http://www.assert-online.org/
Cechticky, V., Pasetti, A., Rohlik, O.: The Model-to-Code Transformation Project website, http://people.ee.ethz.ch/~ceg/assert/model2code/
ISO SC22/WG9: Ada Reference Manual. Language and Standard Libraries. Consolidated Standard ISO/IEC 8652:1995(E) with Technical Corrigendum 1 and Amendment 1 (Draft 16) (2006) Available at, http://www.adaic.com/standards/rm-amend/html/RM-TTL.html
Mazzini, S., D’Alessandro, M., Di Natale, M., Lipari, G., Vardanega, T.: Issues in Mapping HRT-HOOD to UML. In: Proc. 15th Euromicro Conference on Real-Time Systems, July 2003, pp. 221–228. IEEE, Los Alamitos (2003)
Mazzini, S., D’Alessandro, M., Di Natale, M., Domenici, A., Lipari, G., Vardanega, T.: HRT-UML: Taking HRT-HOOD onto UML. In: Rosen, J.-P., Strohmeier, A. (eds.) Ada-Europe 2003. LNCS, vol. 2655, pp. 405–416. Springer, Heidelberg (2003)
Vardanega, T., Di Natale, M., Mazzini, S., D’Alessandro, M.: Component-Based Real-Time Design: Mapping HRT-HOOD to UML. In: Proc. 30th Euromicro Conference, pp. 6–13. IEEE CS Press, Los Alamitos (2004)
Vardanega, T., Zamorano, J., de la Puente, J.A.: On the Dynamic Semantics and the Timing Behaviour of Ravenscar Kernels. Real-Time Systems 29(1), 59–89 (2005)
Goodenough, J., Sha, L.: The priority ceiling protocol: a method for minimizing the blocking of high priority Ada Tasks. Technical Report SEI-SSR-4, Software Engineering Institute, Pittsburgh, Pennsylvania (1988)
Dijkstra, E.: Guarded commands, nondeterminacy and formal derivation of programs. CACM 18(8), 453–457 (1975)
Bordin, M., Vardanega, T.: Automated Model-based Generation of Ravenscar-compliant Source Code. In: Proc. 17th Euromicro Conference on Real-Time Systems, July 2005, pp. 69–77. IEEE, Los Alamitos (2005)
Bordin, M., Vardanega, T.: A New Strategy for the HRT-HOOD to Ada Mapping. In: Vardanega, T., Wellings, A.J. (eds.) Ada-Europe 2005. LNCS, vol. 3555, pp. 51–66. Springer, Heidelberg (2005)
Ober, I., Graf, S., Ober, I.: Validating timed UML models by simulation and verification. STTT. Int. Journal on Software Tools for Technology Transfer (2005)
Latella, D., Majzik, I., Massink, M.: Automatic verification of a behavioral subset of UML statechart diagrams using the SPiN model-checker. Formal Aspects of Computing (11) (1999)
Packet Utilization Standard, European Space Agency, ESA PSS-07-101 (ECSS version ECSS-E-70-41). Available from: http://www.ecss.nl/forums/ecss/_templates/default.htm?target=http://www.ecss.nl/forums/ecss/dispatch.cgi/standards/showFolder/100004/def/def/a492
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Cechticky, V., Egli, M., Pasetti, A., Rohlik, O., Vardanega, T. (2006). A UML2 Profile for Reusable and Verifiable Software Components for Real-Time Applications. In: Morisio, M. (eds) Reuse of Off-the-Shelf Components. ICSR 2006. Lecture Notes in Computer Science, vol 4039. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11763864_23
Download citation
DOI: https://doi.org/10.1007/11763864_23
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-34606-7
Online ISBN: 978-3-540-34607-4
eBook Packages: Computer ScienceComputer Science (R0)