Abstract
As modern microprocessros and embedded processors employ deeper pipelines and issue multiple instructions per cycle, accurate branch predictors become an essential part of processor architectures. In this paper, we introduce a history length adjustable gshare predictor for the high-performance embedded processors and show its low-level implementation. Compared to the previous gshare predictor, history length adjustable gshare predictor selectively utilizes the branch history, resulting in substantial improvement in branch prediction accuracy.
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© 2006 Springer-Verlag Berlin Heidelberg
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Kwak, J.W., Jhang, S.T., Jhon, C.S. (2006). History Length Adjustable gshare Predictor for High-Performance Embedded Processor. In: Gavrilova, M.L., et al. Computational Science and Its Applications - ICCSA 2006. ICCSA 2006. Lecture Notes in Computer Science, vol 3983. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11751632_69
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DOI: https://doi.org/10.1007/11751632_69
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-34077-5
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