Abstract
We consider the problem of efficiently generating sequences in hardware for use in certain cryptographic algorithms. The conventional method of doing this is to use a counter. We show that sequences generated by linear feedback shift registers (LFSRs) can be tailored to suit the appropriate algorithms. For hardware implementation, this reduces both time and chip area. As a result, we are able to suggest improvements to the design of DES Cracker built by the Electronic Frontier Foundation in 1998; provide an efficient strategy for generating start points in time-memory trade/off attacks; and present an improved parallel hardware implementation of a variant of the counter mode of operation of a block cipher.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Electronics Frontier Foundation, Cracking DES, O’Reilly and Associates (1998)
Bernstein, D.J.: Salsa20 specification, ecrypt submission (2005), http://www.ecrypt.eu.org/
Burman, S., Sarkar, P.: An Efficient Algorithm for Software Generation of Binary Linear Recurrences. Appl. Algebra Eng. Commun. Comput. 15(3-4), 201–203 (2004)
Diffie, W., Hellman, M.: Privacy and Authentication: An Introduction to Cryptography. Proceedings of the IEEE 67, 397–427 (1979)
Hellman, M.: A cryptanalytic Time-Memory Trade-off. IEEE Transactions on Information Theory 26, 401–406 (1980)
Lidl, R., Niederreriter, H.: Introduction to Finite Fields and their applications, pp. 189–249. Cambridge University Press, Cambridge (1994) (revised edition)
Menezes, A.J., van Oorschot, P.C., Vanstone, S.A.: Handbook of Applied Cryptography, pp. 195–201. CRC, Boca Raton (2001)
Mentens, N., Batina, L., Preneel, B., Verbauwhede, I.: Cracking Unix passwords using FPGA platforms. Presented at SHARCS 2005 (2005)
Mukhopadhyay, S., Sarkar, P.: Application of LFSRs in Time/Memory Trade-Off Cryptanalysis. In: Song, J.-S., Kwon, T., Yung, M. (eds.) WISA 2005. LNCS, vol. 3786, pp. 25–37. Springer, Heidelberg (2006)
Mukhopadhyay, S., Sarkar, P.: Application of LFSRs for Parallel Sequence Generation in Cryptologic Algorithms, Cryptology ePrint Technical report 2006/042 (February 6, 2006), http://eprint.iacr.org/2006/042
Oechslin, P.: Making a faster cryptanalytic time-memory trade-off. In: Boneh, D. (ed.) CRYPTO 2003. LNCS, vol. 2729, pp. 617–630. Springer, Heidelberg (2003)
Quisquater, J.J., Standaert, F.X.: Exhaustive Key Search of the DES: Updates and Refinements. Presented at SHARCS 2005 (2005)
Wiener, M.J.: Efficient DES Key Search. In: Stallings, W. (ed.) presented at the rump session of CRYTO 1993, reprented in Practical Cryptography for Data Internetworks, pp. 31–79. IEEE Computer Society Press, Los Alamitos (1996)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Mukhopadhyay, S., Sarkar, P. (2006). Application of LFSRs for Parallel Sequence Generation in Cryptologic Algorithms. In: Gavrilova, M., et al. Computational Science and Its Applications - ICCSA 2006. ICCSA 2006. Lecture Notes in Computer Science, vol 3982. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11751595_47
Download citation
DOI: https://doi.org/10.1007/11751595_47
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-34075-1
Online ISBN: 978-3-540-34076-8
eBook Packages: Computer ScienceComputer Science (R0)