Abstract
This paper introduces a quantitative approach to the reduction of system-level power dissipation reducing the Peak-to-Average Power Ratio (PAPR) in multicarrier systems. In particular introduces a VLSI implementation of Partial Transmit Sequences (PTS) approach. PTS is a distortionless Peak-to-Average Power Ratio (PAPR) reduction scheme suitable for Orthogonal Frequency Division Multiplexing (OFDM) which imposes low additional complexity to the overall system. We show that the application of this method reduces the power consumption of the complete digital-analog system by even 12.6%. Furthermore, this paper examines theoretically the relationship between the achieved PAPR reduction and the corresponding PA efficiency. Subsequently the achieved PAPR reduction and the corresponding power saving are evaluated via simulation.
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Giannopoulos, T., Paliouras, V. (2005). Low-Power VLSI Architectures for OFDM Transmitters Based on PAPR Reduction. In: Paliouras, V., Vounckx, J., Verkest, D. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2005. Lecture Notes in Computer Science, vol 3728. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11556930_19
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DOI: https://doi.org/10.1007/11556930_19
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-29013-1
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