Comparative Investigation into Classical and Spiking Neuron Implementations on FPGAs
The current growth of neuron technology is reflected by the increasing focus on this research area within the European research community. One topic is the implementation of neural networks (NNs) onto silicon. FPGAs provide an excellent platform for such implementations. The development of NNs has led to multiple abstractions for various generations. The different demands that each generation pose, present different design challenges. This has left ambiguous decisions for the neuroengineer into what model to implement. The authors have undertaken an investigation into four commonly selected neuron models, two classical models and two formal spike models. A software classification problem is combined with hardware resource requirements for FPGAs, implemented utilising a novel design flow. This provides an overall comparative analysis to be made and identification of the most suitable model to implement on an FPGA.
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