Abstract
The ideas presented in this paper are results of a new research project, ”Reconfigurable POEtic Tissue”. The goal of the project was the development of a hardware platform capable of implementing bio-inspired systems, in digital hardware. In particular, the final hardware device, while similar to other FPGAs, was designed with a number of novel features which facilitate faulttolerance. These include dynamic reconfiguration and on-chip re-programming. This paper considers these features in the context of fault-tolerant system design and shows how an ensemble of different, but often complementary, techniques might be produced using these novel device features. Such characteristics are crucial for many control systems, particularly with safety implications.
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References
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© 2005 Springer-Verlag Berlin Heidelberg
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Barker, W., Tyrrell, A.M. (2005). Hardware Fault-Tolerance Within the POEtic System. In: Moreno, J.M., Madrenas, J., Cosp, J. (eds) Evolvable Systems: From Biology to Hardware. ICES 2005. Lecture Notes in Computer Science, vol 3637. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11549703_3
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DOI: https://doi.org/10.1007/11549703_3
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