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Dual-Stack Return Address Predictor

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Embedded Software and Systems (ICESS 2004)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 3605))

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Abstract

Return address predictors used currently almost have the same architecture: a return address stack and a top-of-stack pointer, some of which may be enhanced by repair mechanisms. The disadvantage of this type of return ad-dress predictor is that either prediction accuracy is low or the hardware cost is high. In this paper, we present a novel kind of return address prediction structure called Dual-Stack Return Address Predictor (DSRAP) which contains two return address stacks: RAS_PRED and RAS_WRB. Just as the return address stack in current return address predictors does, RAS_PRED provides predicted target addresses for procedure returns. RAS_WRB provides data for repairing RAS_PRED when a branch misprediction is detected. Results show that DSRAP can acquire 100% hit rates if mispredictions caused by unmatched call/return sequences or the stack overflow are ignored. Furthermore, DSRAP is very easy to design.

This work was supported by Chinese NSF project (60376018) and Chinese NSF project (90207011).

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© 2005 Springer-Verlag Berlin Heidelberg

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Sun, C., Zhang, M. (2005). Dual-Stack Return Address Predictor. In: Wu, Z., Chen, C., Guo, M., Bu, J. (eds) Embedded Software and Systems. ICESS 2004. Lecture Notes in Computer Science, vol 3605. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11535409_24

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  • DOI: https://doi.org/10.1007/11535409_24

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-28128-3

  • Online ISBN: 978-3-540-31823-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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