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A Programming Model for an Embedded Media Processing Architecture

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Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2005)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 3553))

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Abstract

To follow rapid evolution of media processing algorithms, the latest media processing architecture enhances the execution efficiencies of media applications by adding a programmable vision processor and by improving memory hierarchy, while complicates the programming. In this paper, the features of this architecture are analyzed, the reason of inefficiency of media application implemented by general programming model is studied and SPUR programming model is proposed. In SPUR, media data and operations are expressed as media streams and corresponding operations naturally. Moreover, algorithm is divided into high-level part written by SP-C and low-level part written by UR-C. Fine-grained data parallelism are exploited explicitly as well. Experimental results show that SPUR provides programmer a novel, expressive and efficient programming way, and obviously improves readability, robustness, development efficiency and object-code quality of media applications.

This work has been supported by the Nation Science Foundation of China (No.60173059).

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References

  1. Lee, R.B., Smith, M.D.: Media processing: A new design target. IEEE Micro, 6–9 (1996)

    Google Scholar 

  2. Lee, R.B.: Accelerating multimedia with enhanced microprocessors. IEEE Micro, 22–32 (1995)

    Google Scholar 

  3. Dasu, A., Panchanathan, S.: A survey of media processing approaches. IEEE Trans. on Circ. and Sys. for Video Tech. 12(8), 633–644 (2002)

    Article  Google Scholar 

  4. Furht, B.: Processor architectures for multimedia: A survey. In: Multimedia Modeling Conf., pp. 89–109 (1997)

    Google Scholar 

  5. Sasaki, H.: Multimedia complex on a chip. In: IEEE Inter. Solid-State Circuits Conf., pp. 16–19 (1996)

    Google Scholar 

  6. Lev, L.A., et al.: A 64-b microprocessor with multimedia support. IEEE Journal of Solid-State Circuits 30, 1227–1238 (1995)

    Article  Google Scholar 

  7. Owens, J.D., et al.: Media processing applications on the imagine stream processor. In: IEEE International Conference on Computer Design, pp. 295–302 (2002)

    Google Scholar 

  8. Aron, N., et al.: Study of multimedia application characteristics [Online] (2003), http://www.stanford.edu/class/ee392c/handouts/apps/media_long.pdf

  9. Pirsch, P., Stolberg, H.J.: Vlsi implementations of image and video multimedia processing. IEEE Trans. on Circ. and Sys. for Video Tech. 8, 878–891 (1998)

    Article  Google Scholar 

  10. Panchanathan, S.: Architectural approaches for multimedia processing. In: Zinterhof, P., Vajtersic, M., Uhl, A. (eds.) ACPC 1999 and ParNum 1999. LNCS, vol. 1557, pp. 196–210. Springer, Heidelberg (1999)

    Chapter  Google Scholar 

  11. Lappalainen, V., et al.: Overview of research efforts on media isa extensions and their usage in video coding. IEEE Trans. on Circ. and Sys. for Video Tech. 12, 660–670 (2002)

    Article  Google Scholar 

  12. Shahbahrami, A., Juurlink, B., Vassiliadis, S.: A comparison between processor architectures for multimedia applications. In: RISC 2004 (2004)

    Google Scholar 

  13. Guštin, V., Bulić, P.: Introducing the vector c. In: 5th Inter. Meeting on High Perf. Comp. for Computational Science VECPAR, pp. 253–266 (2002)

    Google Scholar 

  14. Kalinov, A., et al.: An ansi c superset for vector and superscalar computers and its retargetable compiler. Journal of C Language Translation 5, 183–198 (1994)

    Google Scholar 

  15. Bulić, P., Guštin, V.: An extended ansi c for processors with a multimedia extension. International Journal of Parallel Programming 31 (2003)

    Google Scholar 

  16. TI: Tms320c6000 optimizing compiler user’s guide (rev. l) (2004), http://www-s.ti.com/sc/psheets/spru187l/spru187l.pdf

  17. Intel: Intel c++ compiler 8.1 for linux (2005), http://www.intel.com/software/products/compilers/clin/

  18. Beemster, M., van Someren, H.: The dsp-c extension to c (2003), http://www.techonline.com/community/tech_group/dsp/tech_paper/36995

  19. Fisher, R.J., Dietz, H.G.: Compiling for SIMD within a register. In: Carter, L., Ferrante, J., Sehr, D., Chatterjee, S., Prins, J.F., Li, Z., Yew, P.-C. (eds.) LCPC 1998. LNCS, vol. 1656, pp. 290–304. Springer, Heidelberg (1999)

    Chapter  Google Scholar 

  20. Philips: Trimedia sde (2000), http://www.alacron.com/downloads/vncl98076xz/sde_2_75006255.pdf

  21. Ramacher, U., et al.: A 53-gops programmable vision processor for processing, coding-decoding and synthesizing of images. In: 31st European Solid-State Device Research Conference (2001)

    Google Scholar 

  22. Kapasi, U.J., et al.: Programmable stream processors. IEEE Computer, 54–62 (2003)

    Google Scholar 

  23. Thies, W., Karczmarek, M., Amarasinghe, S.: Streamit: A language for streaming applications. In: Inter. Conf. on Compiler Construction (2002)

    Google Scholar 

  24. Leadtek: Vfast architectural reference manual. Something (2001)

    Google Scholar 

  25. Pollard, N., May, D.: Using interval arithmetic to calculate data sizes for compilation to multimedia instruction sets. In: ACM Multimedia 1998, pp. 279–284 (1998)

    Google Scholar 

  26. Lim, J.S.: Two-Dimensional Signal and Image Processing, pp. 478–488. Prentice Hall, Englewood Cliffs (1990)

    Google Scholar 

  27. Wallace, G.K.: The jpeg still picture compression standard. Communications of the ACM 34, 30–44 (1991)

    Article  Google Scholar 

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© 2005 Springer-Verlag Berlin Heidelberg

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Zhang, D., Li, ZZ., Song, H., Liu, L. (2005). A Programming Model for an Embedded Media Processing Architecture. In: Hämäläinen, T.D., Pimentel, A.D., Takala, J., Vassiliadis, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2005. Lecture Notes in Computer Science, vol 3553. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11512622_27

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  • DOI: https://doi.org/10.1007/11512622_27

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-26969-4

  • Online ISBN: 978-3-540-31664-0

  • eBook Packages: Computer ScienceComputer Science (R0)

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