Abstract
A feasibility study of rare earth oxides for replacing SiO2 gate oxide for CMOS integrated circuits has been conducted. Rare earth oxides have relatively higher dielectric constants and are suitable as gate dielectrics. Two-dimensional device simulations reveal that the desirable dielectric constant, without affecting the short-channel performance, is less than 50. The dielectric constant values of rare earth oxides satisfy this condition. One of the issues in rare earth oxides that needs to be addressed is the hygroscopic properties of the film. These physical and electrical changes in the oxides caused by this moisture absorption, which are not suitable in electronics applications, can be suppressed by coating a metal film or by using a passivation layer.
Of all the rare earth oxides, it is found that La2O3, after a proper heat treatment, has the best electrical properties for gate insulator applications in MOSFETs, because of its higher barrier height for the conduction band electrons and valence band holes as well as its higher dielectric constant. The smallest gate leakage current demonstrated through experimental results was 3 × 10–4/cm3 at 1 V for an EOT of 0.6 nm. The conduction mechanism through La2O3 has been modeled, and has been shown to be mainly by SCLC.
With post-metallization annealing (PMA) after Al gate electrode formation, La2O3 gated MISFET has shown high effective electron mobility of 319 cm2/Vs. This value is lower compared to SiO2, but still one of the highest among all the high-κ MISFETs, for a gate oxide EOT value which is slightly larger than 2.3 nm. The PMA recovers the flat band shift and improves the mobility presumably by the diffusion of Al into La2O3 which compensates the positive charges in the film. However, the growth of an interfacial Al2O3 layer, which results in an increase in EOT, is still a problem. The solution could be to replace the Al gate electrode with a less reactive metal with La2O3, and doping La2O3 films with some elements which compensate the negative charge.
Interfacial layer suppression between the silicon substrate and the La2O3 film has been accomplished by using Y2O3 as a buffer layer, which is necessary to achieve an EOT less than 1 nm.
Reliability and yield of rare earth oxides still need to be investigated, but the results shown here hold promise for rare earth oxides, especially La2O3, as a suitable candidate for the post-Hf-based gate insulator in advanced CMOS integrated circuits.
This is a preview of subscription content, log in via an institution.
Preview
Unable to display preview. Download preview PDF.
References
C. Mead, L. Conway: Introduction to VLSI Systems (Addison-Wesley 1979)
H. S. Momose, M. Ono, T. Yoshitomi, T. Ohguro, S. Nakamura, M. Saito, H. Iwai: Tunneling gate oxide approach to ultra-high current drive in small-geometry MOSFETs, IEDM Tech. Dig. 593 (1994)
H. Wakabayashi, S. Yamagami, N. Ikezawa, A. Ogura, M. Narihiro, K. Arai, Y. Ochiai, K. Takeuchi, T. Yamamoto, T. Mogami: Sub-10-nm planar-bulk-CMOS devices usgin lateral junction control, IEDM Tech. Dig. 989 (2003)
R. Chau, J. Kavalieros, B. Roberds, B. Schenker, D. Lionberger, D. Barlage, B. Doyle, R. Arghavani, A. Murthy, G. Dewey: 30 nm physical gate length CMOS transistors with 1.0 ps n-MOS and 1.7 ps p-MOS gate delays, IEDM Tech. Dig. 45 (2000)
J. Robertson: Band offsets of high dielectric constant gate oxides on silicon, J. Non-Cryst. Solids 303, 94 (2002)
T. Aoyama, T. Maeda, K. Torii, K. Yamashita, Y. Kobayashi, S. Kamiyama, T. Miura, H. Kitajima, T. Arikado: Proposal of new HfSiON CMOS fabrication process (HAMDAMA) for low standby power device, IEDM Tech. Dig. 95 (2004)
C. Choi, C. Y. Kang, S. J. Rhee, M. S. Abkar, S. A. Krishn, M. Zhang, H. Kim, T. Lee, F. Zhu, I. Ok, S. Koveshnikov, J. C. Lee: Fabrication of TaN-gated ultra-thin MOSFETs (EOT = 1.0nm) with HfO2 using a novel oxygen scavenging process for sub 65 nm application, Symp. of VLSI Technology 226 (2005)
T. Hattori, T. Yoshida, T. Shiraishi, K. Takahashi, H. Nohira, S. Joumori, K. Nakajima, M. Suzuki, K. Kimura, I. Kashiwagi, C. Ohshima, S. Ohmi, H. Iwai: Composition, chemical structure, and electronic band stucture of rare earth oxide/Si(100) interfacial transition layer, Microelectron. Eng. 72, 283 (2004)
H. Iwai, S. Ohmi, S. Akama, C. Ohshima, A. Kikuchi, I. Kashiwagi, J. Taguchi, H. Yamamoto, J. Tonotani, Y. Kim, I. Ueda, A. Kuriyama, Y. Yoshihara: Advanced gate dielectric materials for sub-100 nm CMOS, IEDM Tech. Dig. 625 (2002)
N. R. Mohapatra, M. P. Desai, S. G. Narendra, V. R. Rao: The effect of high-k gate dielectrics on deep submicrometer CMOS device and circuit performance, IEEE Trans. Elec. Dev. 49, 826 (2002)
Y. Kim, S. I. Ohmi, K. Tsutsui, H. Iwai: Analysis of variation in leakage currents of lanthana thin films, Solid-State Electron. 49, 825 (2005)
N. Yang, K. Henson, J. Hauser, J. Wortman: Modeling of study of ultrahin gate oxides using direct tunneling current and capacitance-voltage measurments in MOS devices, IEEE Trans. Elec. Dev. 46, 1464 (1999)
D. A. Buchanan, E. P. Gusev, E. Cartier, H. Okorn-Schmidt, K. Rim, M. A. Gribelyuk, A. Mocuta, A. Jamison, J. Brown, R. Arndt: 80 nm poly-silicon gated n-FETs with ultra-thin Al2O3 gate dieletric for ULSI applications, IEDM Tech. Dig. 223 (2000)
A. Sussman: Space-charge-limited currents in copper phthalocyanine thin films, J. Appl. Phys. 38, 2738 (1967)
Y. Yeo, T. King, C. Hu: Direct tunneling leakage current and scalability of alternative gate dielectrics, Appl. Phys. Lett. 81, 2091 (2002)
J. A. Ng, Y. Kuroki, N. Sugii, K. Kakushima, S. I. Ohmi, K. Tsutsui, T. Hattori, H. Iwai, H. Wong: Effects of low temperature annealing on the ultrathin La2O3 gate dielectric; comparison of post deposition annealing and post metallization annealing, Microelectron. Eng. 80, 206 (2005)
H. Wong, K. L. Ng, N. Zhan, M. C. Poon, C. W. Kok: Interface bonding structure of hafnium oxide prepared by direct sputtering of hafnium in oxygen, J. Vac. Sci. Technol. B 22, 1094 (2004)
K. Torii, Y. Shimamoto, S. Saito, K. Obata, T. Yamauchi, D. Hisamoto, T. Onai, M. Hiratani: Effect of interfacial oxide on electron mobility in MISFETs with Al2O3 gate dielectrics, Microelectron. Eng. 65, 447 (2003)
E. Simoen, C. Claeys: On the flicker noise in submicron silicon MOSFETs, Solid-State Electron. 43, 865 (1999)
International Technology Roadmap for Semiconductors
Author information
Authors and Affiliations
Editor information
Rights and permissions
About this chapter
Cite this chapter
Kakushima, K., Tsutsui, K., Ohmi, SI., Ahmet, P., Rao, V.R., Iwai, H. Rare Earth Oxides in Microelectronics. In: Fanciulli, M., Scarel, G. (eds) Rare Earth Oxide Thin Films. Topics in Applied Physics, vol 106. Springer, Berlin, Heidelberg . https://doi.org/10.1007/11499893_20
Download citation
DOI: https://doi.org/10.1007/11499893_20
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-35796-4
Online ISBN: 978-3-540-35797-1
eBook Packages: Physics and AstronomyPhysics and Astronomy (R0)