Skip to main content

The Role of Au/Sn Solder in Packaging

  • Chapter
Book cover Materials for Information Technology

Part of the book series: Engineering Materials and Processes ((EMP))

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 219.00
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Zama, S. et al, “Flip Chip Interconnect Systems Using Wire Stud Bumps and Lead Free Solder,” Proc 50th Electronic Components and Technology Conf, Las Vegas, May 2000.

    Google Scholar 

  2. A. Zribi, et al. “Solder metallization interdiffusion in microelectronic interconnects,” in Proc. 49th IEEE Electron. Comp. Technol. Conf., 1999, p. 451–457.

    Google Scholar 

  3. H. Okamoto, T.B. Massalski, “The Au-Sn(Gold-Tin) System” in Phase diagram of binary gold alloys, p. 278–289, ASM International, Metals Park, Ohio, 1987

    Google Scholar 

  4. Engelmann, G., Ehrmann O., Simon, J., Reichl, H., “Development of a Fine Pitch Bumping Process,” Proc 1st International Conference on Micro, Electro, Opto, Mechanic Systems and Components, Berlin, Germany, 1990.

    Google Scholar 

  5. Dietrich, L., Engelmann, G., Ehrmann, O., Reichl, H., “Gold and Gold-Tin Wafer Bumping by Electrochemical Deposition for Flip Chip and TAB,” 3rd European Conference on Electronic Packaging Technology (EuPac’98), Nuremberg, Germany, June 15–17, 1998.

    Google Scholar 

  6. Kallmayer, C., Oppermann, H.H., Kloeser, J., Zakel, E., Reichl, H.: “Experimental Results on the Self-Alignment Process using Au/Sn Metallurgy and on the Growth of the ζ-Phase During the Reflow”. Proceedings of the International Flip Chip, Ball Grid Array, TAB and Advanced Packaging Symposium (ITAP’ 95), February 1995, San Jose, California, p. 225–236.

    Google Scholar 

  7. Zakel, E., Reichl, H.: “Flip Chip Assembly Using Gold, Gold-Tin, and Nickel-Gold Metallurgy”, in Flip Chip Technologies, ed. John Lau, Chap. 15, McGraw-Hill, 1995.

    Google Scholar 

  8. M. Hutter, H. Oppermann, G. Engelmann, J. Wolf, O. Ehrmann, R. Aschenbrenner et al., Calculation of Shape and Experimental Creation of AuSn Solder Bumps for Flip Chip Applications. 52nd ECTC Electronic Components and Technology Conference, 2002, p 282–8.

    Google Scholar 

  9. Zakel, E.; Reichl, H.: “Au-Sn bonding metallurgy of TAB contacts and its influence on the kirkendall effect in the ternary Cu-Au-Sn”, IEEE Transactions on Components, Hybrids and Manufacturing Technology, 16,3, p. 323–332 (1993).

    Article  Google Scholar 

  10. Anhöck, S., Oppermann, H., Kallmayer, C., Aschenbrenner, R., Thomas, L., Reichl, H.: “Investigations of AuSn Alloys on Different End-Metallizations for High Temperature Applications”. 22nd IEEE/CPMT International Electronics Manufacturing Technology Symposium (IEMT Europe 98), 1998, p. 156–65.

    Google Scholar 

  11. G. Elger, J. Voigt, H. Oppermann: “Application of Flip-Chip Bonders in AuSn Solder Processes to Achieve High After Bonding Accuracy for Optoelectronic Modules”. LEOS 2001. Lasers and Electro-Optics Society, 2001. The 14th Annual Meeting of the IEEE Conference Proceedings, Volume: 2, November 11–15, 2001, San Diego, USA, p. 437–8.

    Google Scholar 

  12. A. Bärwolff, J.W. Tomm, R. Müller, S. Weiß, M. Hutter, H. Oppermann, H. Reichl: “Spectroscopic Measurement of Mounting-Induced Strain in Optoelectronic Devices”. IEEE Transaction on Advanced Packaging, 23,2, p. 170–5 (2000).

    Article  Google Scholar 

  13. G. Elger, R. Jordan, M. v. Suchodoletz, H. Oppermann: Development of an Low Cost Wafer Level Flip Chip Assembly Process for High Brightness LEDs Using the AuSn Metallurgy. 35th International Symposium on Microelectronics, September 4–6, 2002, Denver, Colorado, p. 199–204.

    Google Scholar 

  14. H. Oppermann, E. Zakel, G. Engelmann, H. Reichl: “Investigation of Self-Alignment During Flip-Chip Assembly Using Eutectic Gold-Tin Metallurgy”. 4th Int. Conf. and Exhibition on Micro Electro, Opto and Mechanical Systems and Components, MST’ 94.

    Google Scholar 

  15. B. Rogge, D. Moser, H. Oppermann, O. Paul, H. Baltes: “Solder-Bonded Micromachined Capacitive Pressure Sensors”. Proceedings of SPIE’s Symposium and Continuing Education on Micromachining and Microfabrication, Santa Clara, September 1998, 3514.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2005 Springer-Verlag London Limited

About this chapter

Cite this chapter

Oppermann, H. (2005). The Role of Au/Sn Solder in Packaging. In: Zschech, E., Whelan, C., Mikolajick, T. (eds) Materials for Information Technology. Engineering Materials and Processes. Springer, London. https://doi.org/10.1007/1-84628-235-7_31

Download citation

  • DOI: https://doi.org/10.1007/1-84628-235-7_31

  • Publisher Name: Springer, London

  • Print ISBN: 978-1-85233-941-8

  • Online ISBN: 978-1-84628-235-5

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics