Skip to main content

Source-Level Models for Software Power Optimization

  • Chapter
  • 519 Accesses

Abstract

This chapter presents a methodology and a set of models supporting energy-driven source-to-source transformations. The most promising code transformation techniques have been identified and studied leading to accurate analytical and/or statistical models. Experimental results obtained for some common embeddedsystem processors over a set of typical benchmarks are discussed, showing the value of the proposed approach as a support tool for embedded software design.

This is a preview of subscription content, log in via an institution.

Buying options

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD   109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD   109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. L. Benini and G. De Micheli. System-level power optimization: Techniques and tools. Transactions on Design Automation of Electronic Systems, 5:115–192, 2000.

    Google Scholar 

  2. F. Catthoor, H. De Man, and C. Hulkarni. Code transformations for low power caching in embedded multimedia processors. Proc. of IPPS/SPDP, pages 292–297, 1998.

    Google Scholar 

  3. D.F. Bacon, S.L. Graham, and O.J. Sharp. Compiler transformations for high performance computing. Technical Report N.UCB/CSD-93-781, University of California at Berkeley, 1993.

    Google Scholar 

  4. M.S. Lam. Software pipelining: An effective scheduling technique for vliw machines. SIGPLAN Conference on Programming Language Design and Implementation, pages 318–328, 1988.

    Google Scholar 

  5. M.S. Lam, E.E. Rothberg, and M.E. Wolfe. The cache performance and optimization of blocked algorithms. Conference on Architectural Support for Programming Languages an Operating Systems, pages 63–74, 1991.

    Google Scholar 

  6. M.J. Wolfe. More iteration space tiling. ACM Proceedings of Supercomputing, pages 655–664, 1989.

    Google Scholar 

  7. C. Brandolese, W. Fornaciari, F. Salice, and D. Sciuto. The impact of source code transformations on software power and energy consumption. Journal of Circuits, Systems and Computers, 11(5):477–502, 2002.

    Article  Google Scholar 

  8. C. Brandolese, W. Fornaciari, F. Salice, and D. Sciuto. Library functions timing characterization for source-level analysis. Conference on Design Automation and Testing in Europe, pages 1132–1133, March 2003.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2004 Springer Science + Business Media, Inc.

About this chapter

Cite this chapter

Brandolese, C., Fornaciari, W., Salice, F. (2004). Source-Level Models for Software Power Optimization. In: Macii, E. (eds) Ultra Low-Power Electronics and Design. Springer, Boston, MA. https://doi.org/10.1007/1-4020-8076-X_9

Download citation

  • DOI: https://doi.org/10.1007/1-4020-8076-X_9

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4020-8075-3

  • Online ISBN: 978-1-4020-8076-0

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics